linux-kernel - RE: [RFC] x86/mce: Add workaround for SKX/CLX/CPX spurious machine checks

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Message-ID: <be53997f26704089b941d33d9bf47bc6@intel.com>
Date:   Mon, 7 Feb 2022 21:07:05 +0000
From:   "Luck, Tony" <tony.luck@...el.com>
To:     Borislav Petkov <bp@...en8.de>
CC:     Jue Wang <juew@...gle.com>, "x86@...nel.org" <x86@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "patches@...ts.linux.dev" <patches@...ts.linux.dev>
Subject: RE: [RFC] x86/mce: Add workaround for SKX/CLX/CPX spurious machine
 checks

> In that case, you can just as well test the MSR bit directly
> MSR_IA32_MISC_ENABLE_FAST_STRING_BIT. If it set, you clear it, done.

Yes. That would work. It's an extra MSR read instead of a memory read. But this
isn't a performance path.

>> Maybe this would be more human friendly?
>> 
>> 		pr_err("CPU%d: Performance now degraded after applying machine check workaround\n",
>> 			smp_processor_id());
>
> Well, is there an erratum you can refer to in it instead?

The erratum has made its way through to the public specification update yet :-(

> Explaining the whole deal in a single error message is hard and almost
> certainly insufficient.

Not ideal, but the message is a search tool to get to these e-mail discussions.

> Also, what's the use of that message issuing once on every CPU? Instead
> of being a _once() message?

pr_err_once() would be better.

-Tony