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Message-ID: <5c1099b2-232f-2dc5-7c31-18fe3343955e@huawei.com>
Date: Mon, 7 Feb 2022 17:40:03 +0800
From: Yicong Yang <yangyicong@...wei.com>
To: Yicong Yang <yangyicong@...ilicon.com>,
<gregkh@...uxfoundation.org>, <helgaas@...nel.org>,
<alexander.shishkin@...ux.intel.com>, <lorenzo.pieralisi@....com>,
<will@...nel.org>, <mark.rutland@....com>,
<mathieu.poirier@...aro.org>, <suzuki.poulose@....com>,
<mike.leach@...aro.org>, <leo.yan@...aro.org>,
<jonathan.cameron@...wei.com>, <daniel.thompson@...aro.org>,
<joro@...tes.org>, <john.garry@...wei.com>,
<shameerali.kolothum.thodi@...wei.com>, <robin.murphy@....com>,
<peterz@...radead.org>, <mingo@...hat.com>, <acme@...nel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<coresight@...ts.linaro.org>, <linux-pci@...r.kernel.org>,
<linux-perf-users@...r.kernel.org>,
<iommu@...ts.linux-foundation.org>
CC: <prime.zeng@...wei.com>, <liuqi115@...wei.com>,
<zhangshaokun@...ilicon.com>, <linuxarm@...wei.com>,
<song.bao.hua@...ilicon.com>
Subject: Re: [PATCH v3 0/8] Add support for HiSilicon PCIe Tune and Trace
device
Hi perf, ETM and PCI related experts,
a gentle ping ... appreciate for the comments.
thanks.
On 2022/1/24 21:11, Yicong Yang wrote:
> HiSilicon PCIe tune and trace device (PTT) is a PCIe Root Complex
> integrated Endpoint (RCiEP) device, providing the capability
> to dynamically monitor and tune the PCIe traffic (tune),
> and trace the TLP headers (trace).
>
> PTT tune is designed for monitoring and adjusting PCIe link parameters.
> We provide several parameters of the PCIe link. Through the driver,
> user can adjust the value of certain parameter to affect the PCIe link
> for the purpose of enhancing the performance in certian situation.
>
> PTT trace is designed for dumping the TLP headers to the memory, which
> can be used to analyze the transactions and usage condition of the PCIe
> Link. Users can choose filters to trace headers, by either requester
> ID, or those downstream of a set of Root Ports on the same core of the
> PTT device. It's also supported to trace the headers of certain type and
> of certain direction.
>
> The driver registers a PMU device for each PTT device. The trace can
> be used through `perf record` and the traced headers can be decoded
> by `perf report`. The perf command support for the device is also
> added in this patchset. The tune can be used through the sysfs
> attributes of related PMU device. See the documentation for the
> detailed usage.
>
> Change since v2:
> - address the comments from Mathieu
> - rename the directory to ptt to match the function of the device
> - spinoff the declarations to a separate header
> - split the trace function to several patches
> - some other comments.
> - make default smmu domain type of PTT device to identity
> Drop the RMR as it's not recommended and use an iommu_def_domain_type
> quirk to passthrough the device DMA as suggested by Robin.
> Link: https://lore.kernel.org/linux-pci/20211116090625.53702-1-yangyicong@hisilicon.com/
>
> Change since v1:
> - switch the user interface of trace to perf from debugfs
> - switch the user interface of tune to sysfs from debugfs
> - add perf tool support to start trace and decode the trace data
> - address the comments of documentation from Bjorn
> - add RMR[1] support of the device as trace works in RMR mode or
> direct DMA mode. RMR support is achieved by common APIs rather
> than the APIs implemented in [1].
> Link: https://lore.kernel.org/lkml/1618654631-42454-1-git-send-email-yangyicong@hisilicon.com/
>
> [1] https://lore.kernel.org/linux-acpi/20210805080724.480-1-shameerali.kolothum.thodi@huawei.com/
>
> Qi Liu (1):
> perf tool: Add support for HiSilicon PCIe Tune and Trace device driver
>
> Yicong Yang (7):
> hwtracing: Add trace function support for HiSilicon PCIe Tune and
> Trace device
> hisi_ptt: Register PMU device for PTT trace
> hisi_ptt: Add support for dynamically updating the filter list
> hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace
> device
> docs: Add HiSilicon PTT device driver documentation
> MAINTAINERS: Add maintainer for HiSilicon PTT driver
> iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to
> identity
>
> Documentation/trace/hisi-ptt.rst | 304 +++++
> MAINTAINERS | 7 +
> drivers/Makefile | 1 +
> drivers/hwtracing/Kconfig | 2 +
> drivers/hwtracing/ptt/Kconfig | 11 +
> drivers/hwtracing/ptt/Makefile | 2 +
> drivers/hwtracing/ptt/hisi_ptt.c | 1124 +++++++++++++++++
> drivers/hwtracing/ptt/hisi_ptt.h | 239 ++++
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 16 +
> tools/perf/arch/arm/util/auxtrace.c | 56 +-
> tools/perf/arch/arm/util/pmu.c | 3 +
> tools/perf/arch/arm64/util/Build | 2 +-
> tools/perf/arch/arm64/util/hisi_ptt.c | 195 +++
> tools/perf/util/Build | 2 +
> tools/perf/util/auxtrace.c | 4 +
> tools/perf/util/auxtrace.h | 1 +
> tools/perf/util/hisi-ptt-decoder/Build | 1 +
> .../hisi-ptt-decoder/hisi-ptt-pkt-decoder.c | 170 +++
> .../hisi-ptt-decoder/hisi-ptt-pkt-decoder.h | 28 +
> tools/perf/util/hisi_ptt.c | 228 ++++
> tools/perf/util/hisi_ptt.h | 28 +
> 21 files changed, 2420 insertions(+), 4 deletions(-)
> create mode 100644 Documentation/trace/hisi-ptt.rst
> create mode 100644 drivers/hwtracing/ptt/Kconfig
> create mode 100644 drivers/hwtracing/ptt/Makefile
> create mode 100644 drivers/hwtracing/ptt/hisi_ptt.c
> create mode 100644 drivers/hwtracing/ptt/hisi_ptt.h
> create mode 100644 tools/perf/arch/arm64/util/hisi_ptt.c
> create mode 100644 tools/perf/util/hisi-ptt-decoder/Build
> create mode 100644 tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.c
> create mode 100644 tools/perf/util/hisi-ptt-decoder/hisi-ptt-pkt-decoder.h
> create mode 100644 tools/perf/util/hisi_ptt.c
> create mode 100644 tools/perf/util/hisi_ptt.h
>
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