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Message-Id: <20220207095832.1590225-3-peng.fan@oss.nxp.com>
Date: Mon, 7 Feb 2022 17:58:29 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: jassisinghbrar@...il.com, robh+dt@...nel.org, shawnguo@...nel.org
Cc: s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
linux-imx@....com, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Peng Fan <peng.fan@....com>
Subject: [PATCH 2/5] dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
From: Peng Fan <peng.fan@....com>
Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication
between Sentinel and Cortex-A cores from hardware design, it could not be
reused for other purpose.
However i.MX93 S4 MU use seperate tx/rx interrupt, so update
interrupts and add interrupt-names property.
Signed-off-by: Peng Fan <peng.fan@....com>
---
.../devicetree/bindings/mailbox/fsl,mu.yaml | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 713cb847cd8c..f99890ae1813 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -29,10 +29,11 @@ properties:
- const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
- const: fsl,imx8-mu-seco
+ - const: fsl,imx93-mu-s4
- const: fsl,imx8ulp-mu-s4
- items:
- const: fsl,imx93-mu
- const: fsl,imx8ulp-mu
+ - const: fsl,imx93-mu
+ - const: fsl,imx8ulp-mu
- items:
- enum:
- fsl,imx7s-mu
@@ -55,7 +56,14 @@ properties:
maxItems: 1
interrupts:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
+
+ interrupt-names:
+ minItems: 1
+ items:
+ - const: txirq
+ - const: rxirq
"#mbox-cells":
description: |
--
2.25.1
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