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Message-ID: <ed6abe6c-11f4-8a5b-e97e-dbfe8c6f093f@microchip.com>
Date:   Mon, 7 Feb 2022 10:33:47 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Tudor.Ambarus@...rochip.com>, <Nicolas.Ferre@...rochip.com>,
        <alexandre.belloni@...tlin.com>
CC:     <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] ARM: dts: at91: sama7g5: Add crypto nodes

On 07.02.2022 05:43, Tudor Ambarus wrote:
> Describe and enable the AES, SHA and TDES crypto IPs. Tested with the
> extra run-time self tests of the registered crypto algorithms.
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
> ---
> v2:
> - add label to the tdes node
> - update commit description and specify testing method
> - put clocks and clock-names properties before dmas and dma-names
>   because the clocks are mandatory, while DMA is optional for TDES and SHA
> 
>  arch/arm/boot/dts/sama7g5.dtsi | 35 ++++++++++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index 7972cb8c2562..a87f498cf098 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -393,6 +393,29 @@ pit64b1: timer@...04000 {
>  			clock-names = "pclk", "gclk";
>  		};
>  
> +		aes: aes@...10000 {
> +			compatible = "atmel,at91sam9g46-aes";
> +			reg = <0xe1810000 0x100>;
> +			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
> +			clock-names = "aes_clk";
> +			dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
> +			       <&dma0 AT91_XDMAC_DT_PERID(2)>;
> +			dma-names = "tx", "rx";
> +			status = "okay";

Hi Tudor,

Lines with:
			status = "okay";

could be removed as this is the default state.

Thank you,
Claudiu Beznea

> +		};
> +
> +		sha: sha@...14000 {
> +			compatible = "atmel,at91sam9g46-sha";
> +			reg = <0xe1814000 0x100>;
> +			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
> +			clock-names = "sha_clk";
> +			dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
> +			dma-names = "tx";
> +			status = "okay";
> +		};
> +
>  		flx0: flexcom@...18000 {
>  			compatible = "atmel,sama5d2-flexcom";
>  			reg = <0xe1818000 0x200>;
> @@ -475,6 +498,18 @@ trng: rng@...10000 {
>  			status = "disabled";
>  		};
>  
> +		tdes: tdes@...14000 {
> +			compatible = "atmel,at91sam9g46-tdes";
> +			reg = <0xe2014000 0x100>;
> +			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 96>;
> +			clock-names = "tdes_clk";
> +			dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,
> +			       <&dma0 AT91_XDMAC_DT_PERID(53)>;
> +			dma-names = "tx", "rx";
> +			status = "okay";
> +		};
> +
>  		flx4: flexcom@...18000 {
>  			compatible = "atmel,sama5d2-flexcom";
>  			reg = <0xe2018000 0x200>;

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