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Date: Tue, 8 Feb 2022 18:18:18 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Inki Dae <inki.dae@...sung.com>,
Joonyoung Shim <jy0922.shim@...sung.com>,
Seung-Woo Kim <sw0312.kim@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Alim Akhtar <alim.akhtar@...sung.com>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>, dri-devel@...ts.freedesktop.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org
Cc: Marek Szyprowski <m.szyprowski@...sung.com>,
Sylwester Nawrocki <snawrocki@...nel.org>
Subject: [PATCH 05/10] dt-bindings: display: samsung,exynos7-decon: convert to dtschema
Convert the Exynos7 DECON display controller bindings to DT schema
format.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
---
.../bindings/display/exynos/exynos7-decon.txt | 65 ----------
.../samsung/samsung,exynos7-decon.yaml | 120 ++++++++++++++++++
2 files changed, 120 insertions(+), 65 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt
create mode 100644 Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml
diff --git a/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt b/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt
deleted file mode 100644
index 53912c99ec38..000000000000
--- a/Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt
+++ /dev/null
@@ -1,65 +0,0 @@
-Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
-
-DECON (Display and Enhancement Controller) is the Display Controller for the
-Exynos7 series of SoCs which transfers the image data from a video memory
-buffer to an external LCD interface.
-
-Required properties:
-- compatible: value should be "samsung,exynos7-decon";
-
-- reg: physical base address and length of the DECON registers set.
-
-- interrupts: should contain a list of all DECON IP block interrupts in the
- order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
- format depends on the interrupt controller used.
-
-- interrupt-names: should contain the interrupt names: "fifo", "vsync",
- "lcd_sys", in the same order as they were listed in the interrupts
- property.
-
-- pinctrl-0: pin control group to be used for this controller.
-
-- pinctrl-names: must contain a "default" entry.
-
-- clocks: must include clock specifiers corresponding to entries in the
- clock-names property.
-
-- clock-names: list of clock names sorted in the same order as the clocks
- property. Must contain "pclk_decon0", "aclk_decon0",
- "decon0_eclk", "decon0_vclk".
-- i80-if-timings: timing configuration for lcd i80 interface support.
-
-Optional Properties:
-- power-domains: a phandle to DECON power domain node.
-- display-timings: timing settings for DECON, as described in document [1].
- Can be used in case timings cannot be provided otherwise
- or to override timings provided by the panel.
-
-[1]: Documentation/devicetree/bindings/display/panel/display-timing.txt
-
-Example:
-
-SoC specific DT entry:
-
- decon@...30000 {
- compatible = "samsung,exynos7-decon";
- interrupt-parent = <&combiner>;
- reg = <0x13930000 0x1000>;
- interrupt-names = "lcd_sys", "vsync", "fifo";
- interrupts = <0 188 0>, <0 189 0>, <0 190 0>;
- clocks = <&clock_disp PCLK_DECON_INT>,
- <&clock_disp ACLK_DECON_INT>,
- <&clock_disp SCLK_DECON_INT_ECLK>,
- <&clock_disp SCLK_DECON_INT_EXTCLKPLL>;
- clock-names = "pclk_decon0", "aclk_decon0", "decon0_eclk",
- "decon0_vclk";
- status = "disabled";
- };
-
-Board specific DT entry:
-
- decon@...30000 {
- pinctrl-0 = <&lcd_clk &pwm1_out>;
- pinctrl-names = "default";
- status = "okay";
- };
diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml
new file mode 100644
index 000000000000..afa137d47922
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON)
+
+maintainers:
+ - Inki Dae <inki.dae@...sung.com>
+ - Joonyoung Shim <jy0922.shim@...sung.com>
+ - Seung-Woo Kim <sw0312.kim@...sung.com>
+ - Kyungmin Park <kyungmin.park@...sung.com>
+ - Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
+
+description: |
+ DECON (Display and Enhancement Controller) is the Display Controller for the
+ Exynos7 series of SoCs which transfers the image data from a video memory
+ buffer to an external LCD interface.
+
+properties:
+ compatible:
+ const: samsung,exynos7-decon
+
+ clocks:
+ minItems: 4
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: pclk_decon0
+ - const: aclk_decon0
+ - const: decon0_eclk
+ - const: decon0_vclk
+
+ display-timings:
+ $ref: ../panel/display-timings.yaml#
+
+ i80-if-timings:
+ type: object
+ description: timing configuration for lcd i80 interface support
+ properties:
+ cs-setup:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Clock cycles for the active period of address signal is enabled until
+ chip select is enabled.
+ default: 0
+
+ wr-active:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Clock cycles for the active period of CS is enabled.
+ default: 1
+
+ wr-hold:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Clock cycles for the active period of CS is disabled until write
+ signal is disabled.
+ default: 0
+
+ wr-setup:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Clock cycles for the active period of CS signal is enabled until
+ write signal is enabled.
+ default: 0
+
+ interrupts:
+ items:
+ - description: FIFO level
+ - description: VSYNC
+ - description: LCD system
+
+ interrupt-names:
+ items:
+ - const: fifo
+ - const: vsync
+ - const: lcd_sys
+
+ power-domains:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos7-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ display-controller@...30000 {
+ compatible = "samsung,exynos7-decon";
+ reg = <0x13930000 0x1000>;
+ interrupt-names = "fifo", "vsync", "lcd_sys";
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock_disp 100>, /* PCLK_DECON_INT */
+ <&clock_disp 101>, /* ACLK_DECON_INT */
+ <&clock_disp 102>, /* SCLK_DECON_INT_ECLK */
+ <&clock_disp 103>; /* SCLK_DECON_INT_EXTCLKPLL */
+ clock-names = "pclk_decon0",
+ "aclk_decon0",
+ "decon0_eclk",
+ "decon0_vclk";
+ pinctrl-0 = <&lcd_clk &pwm1_out>;
+ pinctrl-names = "default";
+ };
--
2.32.0
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