lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Message-Id: <20220208203419.1094362-6-bob.beckett@collabora.com> Date: Tue, 8 Feb 2022 20:34:19 +0000 From: Robert Beckett <bob.beckett@...labora.com> To: Jani Nikula <jani.nikula@...ux.intel.com>, Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>, Rodrigo Vivi <rodrigo.vivi@...el.com>, Tvrtko Ursulin <tvrtko.ursulin@...ux.intel.com>, David Airlie <airlied@...ux.ie>, Daniel Vetter <daniel@...ll.ch> Cc: Matthew Auld <matthew.auld@...el.com>, Ramalingam C <ramalingam.c@...el.com>, Robert Beckett <bob.beckett@...labora.com>, Jordan Justen <jordan.l.justen@...el.com>, Thomas Hellström <thomas.hellstrom@...ux.intel.com>, Simon Ser <contact@...rsion.fr>, Pekka Paalanen <ppaalanen@...il.com>, Kenneth Graunke <kenneth@...tecape.org>, mesa-dev@...ts.freedesktop.org, Tony Ye <tony.ye@...el.com>, Slawomir Milczarek <slawomir.milczarek@...el.com>, intel-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org Subject: [PATCH v8 5/5] drm/i915/uapi: document behaviour for DG2 64K support From: Matthew Auld <matthew.auld@...el.com> On discrete platforms like DG2, we need to support a minimum page size of 64K when dealing with device local-memory. This is quite tricky for various reasons, so try to document the new implicit uapi for this. v3: fix typos and less emphasis v2: Fixed suggestions on formatting [Daniel] Signed-off-by: Matthew Auld <matthew.auld@...el.com> Signed-off-by: Ramalingam C <ramalingam.c@...el.com> Signed-off-by: Robert Beckett <bob.beckett@...labora.com> Acked-by: Jordan Justen <jordan.l.justen@...el.com> Reviewed-by: Ramalingam C <ramalingam.c@...el.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@...ux.intel.com> cc: Simon Ser <contact@...rsion.fr> cc: Pekka Paalanen <ppaalanen@...il.com> Cc: Jordan Justen <jordan.l.justen@...el.com> Cc: Kenneth Graunke <kenneth@...tecape.org> Cc: mesa-dev@...ts.freedesktop.org Cc: Tony Ye <tony.ye@...el.com> Cc: Slawomir Milczarek <slawomir.milczarek@...el.com> --- include/uapi/drm/i915_drm.h | 44 ++++++++++++++++++++++++++++++++----- 1 file changed, 39 insertions(+), 5 deletions(-) diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 5e678917da70..77e5e74c32c1 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -1118,10 +1118,16 @@ struct drm_i915_gem_exec_object2 { /** * When the EXEC_OBJECT_PINNED flag is specified this is populated by * the user with the GTT offset at which this object will be pinned. + * * When the I915_EXEC_NO_RELOC flag is specified this must contain the * presumed_offset of the object. + * * During execbuffer2 the kernel populates it with the value of the * current GTT offset of the object, for future presumed_offset writes. + * + * See struct drm_i915_gem_create_ext for the rules when dealing with + * alignment restrictions with I915_MEMORY_CLASS_DEVICE, on devices with + * minimum page sizes, like DG2. */ __u64 offset; @@ -3145,11 +3151,39 @@ struct drm_i915_gem_create_ext { * * The (page-aligned) allocated size for the object will be returned. * - * Note that for some devices we have might have further minimum - * page-size restrictions(larger than 4K), like for device local-memory. - * However in general the final size here should always reflect any - * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS - * extension to place the object in device local-memory. + * + * DG2 64K min page size implications: + * + * On discrete platforms, starting from DG2, we have to contend with GTT + * page size restrictions when dealing with I915_MEMORY_CLASS_DEVICE + * objects. Specifically the hardware only supports 64K or larger GTT + * page sizes for such memory. The kernel will already ensure that all + * I915_MEMORY_CLASS_DEVICE memory is allocated using 64K or larger page + * sizes underneath. + * + * Note that the returned size here will always reflect any required + * rounding up done by the kernel, i.e 4K will now become 64K on devices + * such as DG2. + * + * Special DG2 GTT address alignment requirement: + * + * The GTT alignment will also need to be at least 2M for such objects. + * + * Note that due to how the hardware implements 64K GTT page support, we + * have some further complications: + * + * 1) The entire PDE (which covers a 2MB virtual address range), must + * contain only 64K PTEs, i.e mixing 4K and 64K PTEs in the same + * PDE is forbidden by the hardware. + * + * 2) We still need to support 4K PTEs for I915_MEMORY_CLASS_SYSTEM + * objects. + * + * To keep things simple for userland, we mandate that any GTT mappings + * must be aligned to and rounded up to 2MB. As this only wastes virtual + * address space and avoids userland having to copy any needlessly + * complicated PDE sharing scheme (coloring) and only affects DG2, this + * is deemed to be a good compromise. */ __u64 size; /** -- 2.25.1
Powered by blists - more mailing lists