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Message-Id: <20220208063046.2265537-3-peng.fan@oss.nxp.com>
Date: Tue, 8 Feb 2022 14:30:44 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: jassisinghbrar@...il.com, robh+dt@...nel.org, shawnguo@...nel.org
Cc: s.hauer@...gutronix.de, kernel@...gutronix.de, festevam@...il.com,
linux-imx@....com, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
krzysztof.kozlowski@...onical.com, Peng Fan <peng.fan@....com>
Subject: [PATCH V2 2/4] dt-bindings: mailbox: imx-mu: add i.MX93 S4 MU support
From: Peng Fan <peng.fan@....com>
Similar to i.MX8ULP S4 MU, i.MX93 MU is dedicated for communication
between Sentinel and Cortex-A cores from hardware design, it could not be
reused for other purpose.
However i.MX93 S4 MU use separate tx/rx interrupt, so update
interrupts and add interrupt-names property.
Signed-off-by: Peng Fan <peng.fan@....com>
---
.../devicetree/bindings/mailbox/fsl,mu.yaml | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
index 6d056d5e16bf..f0a7e693ebf8 100644
--- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
@@ -29,6 +29,7 @@ properties:
- const: fsl,imx8ulp-mu
- const: fsl,imx8-mu-scu
- const: fsl,imx8-mu-seco
+ - const: fsl,imx93-mu-s4
- const: fsl,imx8ulp-mu-s4
- items:
- const: fsl,imx93-mu
@@ -57,6 +58,12 @@ properties:
interrupts:
maxItems: 1
+ interrupt-names:
+ minItems: 1
+ items:
+ - const: txirq
+ - const: rxirq
+
"#mbox-cells":
description: |
<&phandle type channel>
@@ -90,6 +97,20 @@ required:
- interrupts
- "#mbox-cells"
+allOf:
+ - if:
+ properties:
+ compatible:
+ enum:
+ - fsl,imx93-mu-s4
+ then:
+ properties:
+ interrupt-names:
+ minItems: 2
+ maxItems: 2
+ interrupts:
+ maxItems: 2
+
additionalProperties: false
examples:
--
2.25.1
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