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Message-Id: <20220208091326.12495-2-yifeng.zhao@rock-chips.com>
Date: Tue, 8 Feb 2022 17:13:23 +0800
From: Yifeng Zhao <yifeng.zhao@...k-chips.com>
To: heiko@...ech.de
Cc: robh+dt@...nel.org, jbx6244@...il.com, devicetree@...r.kernel.org,
vkoul@...nel.org, michael.riesch@...fvision.net,
linux-rockchip@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-phy@...ts.infradead.org, kishon@...com,
p.zabel@...gutronix.de, cl@...k-chips.com,
kever.yang@...k-chips.com, lee.jones@...aro.org,
wulf@...k-chips.com, david.wu@...k-chips.com,
Yifeng Zhao <yifeng.zhao@...k-chips.com>
Subject: [PATCH v8 1/4] dt-bindings: soc: grf: add naneng combo phy register compatible
From: Johan Jonker <jbx6244@...il.com>
Add Naneng combo phy register compatible.
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Johan Jonker <jbx6244@...il.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@...k-chips.com>
---
Changes in v8: None
Changes in v7: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index b2ba7bed89b2..5079e9d24af6 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -15,6 +15,8 @@ properties:
- items:
- enum:
- rockchip,rk3288-sgrf
+ - rockchip,rk3568-pipe-grf
+ - rockchip,rk3568-pipe-phy-grf
- rockchip,rk3568-usb2phy-grf
- rockchip,rv1108-usbgrf
- const: syscon
--
2.17.1
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