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Message-ID: <9a07be5a-914b-cec9-f6bc-8c1b0ecef766@gmail.com>
Date:   Wed, 9 Feb 2022 19:08:20 +0300
From:   Sergei Shtylyov <sergei.shtylyov@...il.com>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Geert Uytterhoeven <geert@...ux-m68k.org>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Rob Herring <robh+dt@...nel.org>,
        Nicolas Saenz Julienne <nsaenz@...nel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        Ray Jui <rjui@...adcom.com>,
        Scott Branden <sbranden@...adcom.com>,
        bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
        Chris Brandt <chris.brandt@...esas.com>,
        Wolfram Sang <wsa+renesas@...g-engineering.com>,
        Linux I2C <linux-i2c@...r.kernel.org>,
        linux-rpi-kernel <linux-rpi-kernel@...ts.infradead.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Prabhakar <prabhakar.csengg@...il.com>,
        Linux-sh list <linux-sh@...r.kernel.org>
Subject: Re: [PATCH 2/3] i2c: sh_mobile: Use platform_get_irq_optional() to
 get the interrupt

On 2/9/22 7:02 PM, Arnd Bergmann wrote:

>>>>> since 2009 after 1e1030dccb10 ("sh: nmi_debug support."). On a
>>>>
>>>>    Mhm... this commit changes the SH3 code while SH778x are SH4A, no?
>>>
>>> This code is shared between both:
>>>
>>> arch/sh/kernel/cpu/sh4/Makefile:common-y        += $(addprefix
>>> ../sh3/, entry.o ex.o)
>>
>>    Ah, quite convoluted! :-)
>>    So you mean thet broke the delivery of EVT 0x200 when mucking with NMI?
> 
> Yes, exactly: If I read this right, the added code:
> 
> +       shlr2   r4
> +       shlr    r4
> +       mov     r4, r0          ! save vector->jmp table offset for later
> +
> +       shlr2   r4              ! vector to IRQ# conversion
> +       add     #-0x10, r4
> +
> +       cmp/pz  r4              ! is it a valid IRQ?
> +       bt      10f
> 
> gets the vector (0x200 for this device), shifts it five bits to 0x10,
> and subtracts 0x10,
> then branches to do_IRQ if the interrupt number is non-zero, otherwise it goes
> through the exception_handling_table.

   The SH4 manual I found on my disk (have it from MontaVista times) tells me cmp/pz
sets T if Rn is >= 0, then bt branches if T = 1. So I do think the code is correct.
   One more thing: the board code for those boards was added in 2011, we can assume
it was working back then, right? :-_

>          Arnd

MBR, Sergey

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