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Message-Id: <20220209162801.7647-1-michael.j.ruhl@intel.com>
Date: Wed, 9 Feb 2022 11:28:01 -0500
From: "Michael J. Ruhl" <michael.j.ruhl@...el.com>
To: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
bhelgaas@...gle.com, logang@...tatee.com, michael.j.ruhl@...el.com
Cc: dan.j.williams@...el.com
Subject: [PATCH] PCI/P2PDMA: Update device table with 3rd gen Xeon platform information
In order to do P2P communication the bridge ID of the platform
must be in the P2P device table.
Update the P2P device table with a device id for the 3rd Gen
Intel Xeon Scalable Processors.
Reviewed-by: Dan Williams <dan.j.williams@...el.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@...el.com>
---
drivers/pci/p2pdma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c
index 1015274bd2fe..30b1df3c9d2f 100644
--- a/drivers/pci/p2pdma.c
+++ b/drivers/pci/p2pdma.c
@@ -321,6 +321,7 @@ static const struct pci_p2pdma_whitelist_entry {
{PCI_VENDOR_ID_INTEL, 0x2032, 0},
{PCI_VENDOR_ID_INTEL, 0x2033, 0},
{PCI_VENDOR_ID_INTEL, 0x2020, 0},
+ {PCI_VENDOR_ID_INTEL, 0x09a2, 0},
{}
};
--
2.31.1
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