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Message-ID: <YgQMNKXytqFZFiib@robh.at.kernel.org>
Date: Wed, 9 Feb 2022 12:47:16 -0600
From: Rob Herring <robh@...nel.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: hch@....de, linux-kernel@...r.kernel.org, maxime@...no.tech,
huffman@...ence.com, liush@...winnertech.com, xinhaoqu@...wei.com,
behrensj@....edu, anup@...infault.org, jscheid@...tanamicro.com,
allen.baum@...erantotech.com, philipp.tomsich@...ll.eu,
aou@...s.berkeley.edu, wefu@...hat.com, arnd@...db.de,
andrea.mondelli@...wei.com, paul.walmsley@...ive.com,
linux-riscv@...ts.infradead.org, robh+dt@...nel.org,
cmuellner@...ux.com, drew@...gleboard.org, rtrauben@...il.com,
samuel@...lland.org, palmer@...belt.com, atishp@...shpatra.org,
mick@....forth.gr, devicetree@...r.kernel.org,
gfavor@...tanamicro.com, wens@...e.org, guoren@...nel.org
Subject: Re: [PATCH v6 11/14] dt-bindings: riscv: add MMU Standard Extensions
support for Svpbmt
On Wed, 09 Feb 2022 13:37:57 +0100, Heiko Stuebner wrote:
> From: Wei Fu <wefu@...hat.com>
>
> Previous patch has added svpbmt in arch/riscv and add "riscv,svpmbt"
> in the DT mmu node. Update dt-bindings related property here.
>
> Signed-off-by: Wei Fu <wefu@...hat.com>
> Co-developed-by: Guo Ren <guoren@...nel.org>
> Signed-off-by: Guo Ren <guoren@...nel.org>
> Signed-off-by: Heiko Stuebner <heiko@...ech.de>
> Cc: Anup Patel <anup@...infault.org>
> Cc: Palmer Dabbelt <palmer@...belt.com>
> Cc: Rob Herring <robh+dt@...nel.org>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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