linux-kernel - Re: [PATCH v4 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses with MMIO accesses

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Date:   Wed, 9 Feb 2022 08:04:10 +0100
From:   Jean Delvare <jdelvare@...e.de>
To:     Terry Bowman <Terry.Bowman@....com>
Cc:     linux@...ck-us.net, linux-watchdog@...r.kernel.org,
        linux-i2c@...r.kernel.org, wsa@...nel.org,
        andy.shevchenko@...il.com, rafael.j.wysocki@...el.com,
        linux-kernel@...r.kernel.org, wim@...ux-watchdog.org,
        rrichter@....com, thomas.lendacky@....com, sudheesh.mavila@....com,
        Nehal-bakulchandra.Shah@....com, Basavaraj.Natikar@....com,
        Shyam-sundar.S-k@....com, Mario.Limonciello@....com
Subject: Re: [PATCH v4 0/9] i2c: piix4: Replace cd6h/cd7h port I/O accesses
 with MMIO accesses

On Tue, 8 Feb 2022 17:03:09 -0600, Terry Bowman wrote:
> On 2/8/22 15:46, Jean Delvare wrote:
> > If so, while there's indeed nothing to be done for the most recent
> > systems where only MMIO access is possible, you may still need to
> > enable MMIO access through legacy I/O if you try to use MMIO on
> > chipsets where both are possible. I'm not sure what exactly where you
> > set the limit. In the last patch you say that 0x51 is the first
> > revision of the family 17h CPUs, but is family 17h the first where MMIO
> > is available, or the first where legacy I/O isn't?
>
> Family 17h, SMBus PCI ID >= 0x51 is the first where cd6h/cd7h port I/O is disabled. 
> If SMBus PCI ID < 0x51 then cd6h/cd7h port I/O is used. 

OK, we are safe then :-)

-- 
Jean Delvare
SUSE L3 Support