lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Wed, 09 Feb 2022 11:19:54 +0100
From:   Heiko Stübner <heiko@...ech.de>
To:     davem@...emloft.net, herbert@...dor.apana.org.au,
        krzysztof.kozlowski@...onical.com, robh+dt@...nel.org,
        Corentin Labbe <clabbe@...libre.com>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-rockchip@...ts.infradead.org,
        Corentin Labbe <clabbe@...libre.com>
Subject: Re: [PATCH] dt-bindings: crypto: rockchip: fix a typo on crypto-controller

Hi Corentin,

Am Mittwoch, 9. Februar 2022, 11:17:21 CET schrieb Corentin Labbe:
> crypto-controller had a typo, fix it.
> 
> Signed-off-by: Corentin Labbe <clabbe@...libre.com>

the binding for the crypto-accelerator is pretty standard
without any crazy stuff, so you could also try to convert it
to the yaml format ;-)


Heiko

> ---
>  Documentation/devicetree/bindings/crypto/rockchip-crypto.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> index 5e2ba385b8c9..53e39d5f94e7 100644
> --- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> @@ -16,7 +16,7 @@ Required properties:
>  
>  Examples:
>  
> -	crypto: cypto-controller@...a0000 {
> +	crypto: crypto-controller@...a0000 {
>  		compatible = "rockchip,rk3288-crypto";
>  		reg = <0xff8a0000 0x4000>;
>  		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> 




Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ