linux-kernel - [PATCH v5] KVM: SVM: Allow AVIC support on system w/ physical APIC ID

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Message-ID: <20220209152038.12303-1-suravee.suthikulpanit@amd.com>
Date:   Wed, 9 Feb 2022 09:20:38 -0600
From:   Suravee Suthikulpanit <suravee.suthikulpanit@....com>
To:     <linux-kernel@...r.kernel.org>, <kvm@...r.kernel.org>,
        <x86@...nel.org>
CC:     <seanjc@...gle.com>, <mlevitsk@...hat.com>, <pbonzini@...hat.com>,
        <joro@...tes.org>, <tglx@...utronix.de>, <mingo@...hat.com>,
        <bp@...en8.de>, <peterz@...radead.org>, <hpa@...or.com>,
        <jon.grimm@....com>, <wei.huang2@....com>, <terry.bowman@....com>,
        Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: [PATCH v5] KVM: SVM: Allow AVIC support on system w/ physical APIC ID > 255

AVIC physical APIC ID table entry contains host physical
APIC ID field, which is used by the hardware to keep track of where
each vCPU is running. Originally, this field is 8-bit when AVIC was
introduced. 

The AMD64 Architecture Programmer’s Manual Volume 2 revision 3.38
specify the physical APIC ID table entry bit [11:8] as reserved
for older generation of AVIC hardware. For newer
hardware, this field is used to specify host physical APIC ID
larger than 255.

Unfortunately, there is no CPUID bit to help determine if AVIC hardware
can support 12-bit host physical APIC ID. For older system, since
the reserved bits [11:8] is documented as should be zero, it should be safe
to increase the host physical ID mask to 12 bits and clear the field
when programing new physical APIC ID.

Suggested-by: Sean Christopherson <seanjc@...gle.com>
Cc: Maxim Levitsky <mlevitsk@...hat.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
---
 arch/x86/kvm/svm/avic.c | 8 ++------
 arch/x86/kvm/svm/svm.h  | 2 +-
 2 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 90364d02f22a..54ad98731181 100644
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -19,6 +19,7 @@
 #include <linux/amd-iommu.h>
 #include <linux/kvm_host.h>
 
+#include <asm/apic.h>
 #include <asm/irq_remapping.h>
 
 #include "trace.h"
@@ -974,17 +975,12 @@ avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r)
 void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
 	u64 entry;
-	/* ID = 0xff (broadcast), ID > 0xff (reserved) */
 	int h_physical_id = kvm_cpu_get_apicid(cpu);
 	struct vcpu_svm *svm = to_svm(vcpu);
 
 	lockdep_assert_preemption_disabled();
 
-	/*
-	 * Since the host physical APIC id is 8 bits,
-	 * we can support host APIC ID upto 255.
-	 */
-	if (WARN_ON(h_physical_id > AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK))
+	if (WARN_ON(h_physical_id & ~AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK))
 		return;
 
 	/*
diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 47ef8f4a9358..cede59cd8999 100644
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -565,7 +565,7 @@ extern struct kvm_x86_nested_ops svm_nested_ops;
 #define AVIC_LOGICAL_ID_ENTRY_VALID_BIT			31
 #define AVIC_LOGICAL_ID_ENTRY_VALID_MASK		(1 << 31)
 
-#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK	(0xFFULL)
+#define AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK	GENMASK_ULL(11, 0)
 #define AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK	(0xFFFFFFFFFFULL << 12)
 #define AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK		(1ULL << 62)
 #define AVIC_PHYSICAL_ID_ENTRY_VALID_MASK		(1ULL << 63)
-- 
2.25.1