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Message-ID: <68aa414b-7a9d-1330-531c-37b2db2ab09d@microchip.com>
Date: Thu, 10 Feb 2022 03:08:47 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <michael@...le.cc>, <linux-mtd@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
CC: <p.yadav@...com>, <miquel.raynal@...tlin.com>, <richard@....at>,
<vigneshr@...com>
Subject: Re: [PATCH v1 05/14] mtd: spi-nor: xilinx: rename vendor specific
functions and defines
On 2/2/22 16:58, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Drop the generic spi_nor prefix for all the xilinx functions.
mm, no, I would keep the spi_nor prefix because xilinx_sr_ready is too
generic and can conflict with methods from other subsystems.
>
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---
> drivers/mtd/spi-nor/xilinx.c | 26 +++++++++++++-------------
> 1 file changed, 13 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/xilinx.c b/drivers/mtd/spi-nor/xilinx.c
> index a865dadc2e5d..3e85530df1e4 100644
> --- a/drivers/mtd/spi-nor/xilinx.c
> +++ b/drivers/mtd/spi-nor/xilinx.c
> @@ -8,9 +8,9 @@
>
> #include "core.h"
>
> -#define SPINOR_OP_XSE 0x50 /* Sector erase */
> -#define SPINOR_OP_XPP 0x82 /* Page program */
> -#define SPINOR_OP_XRDSR 0xd7 /* Read status register */
> +#define XILINX_OP_SE 0x50 /* Sector erase */
> +#define XILINX_OP_PP 0x82 /* Page program */
> +#define XILINX_OP_RDSR 0xd7 /* Read status register */
>
> #define XSR_PAGESIZE BIT(0) /* Page size in Po2 or Linear */
> #define XSR_RDY BIT(7) /* Ready */
> @@ -60,20 +60,20 @@ static u32 s3an_convert_addr(struct spi_nor *nor, u32 addr)
> }
>
> /**
> - * spi_nor_xread_sr() - Read the Status Register on S3AN flashes.
> + * xilinx_read_sr() - Read the Status Register on S3AN flashes.
> * @nor: pointer to 'struct spi_nor'.
> * @sr: pointer to a DMA-able buffer where the value of the
> * Status Register will be written.
> *
> * Return: 0 on success, -errno otherwise.
> */
> -static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
> +static int xilinx_read_sr(struct spi_nor *nor, u8 *sr)
> {
> int ret;
>
> if (nor->spimem) {
> struct spi_mem_op op =
> - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_XRDSR, 0),
> + SPI_MEM_OP(SPI_MEM_OP_CMD(XILINX_OP_RDSR, 0),
> SPI_MEM_OP_NO_ADDR,
> SPI_MEM_OP_NO_DUMMY,
> SPI_MEM_OP_DATA_IN(1, sr, 0));
> @@ -82,7 +82,7 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
>
> ret = spi_mem_exec_op(nor->spimem, &op);
> } else {
> - ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_XRDSR, sr,
> + ret = spi_nor_controller_ops_read_reg(nor, XILINX_OP_RDSR, sr,
> 1);
> }
>
> @@ -99,11 +99,11 @@ static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
> *
> * Return: 1 if ready, 0 if not ready, -errno on errors.
> */
> -static int spi_nor_xsr_ready(struct spi_nor *nor)
> +static int xilinx_sr_ready(struct spi_nor *nor)
> {
> int ret;
>
> - ret = spi_nor_xread_sr(nor, nor->bouncebuf);
> + ret = xilinx_read_sr(nor, nor->bouncebuf);
> if (ret)
> return ret;
>
> @@ -116,12 +116,12 @@ static int xilinx_nor_setup(struct spi_nor *nor,
> u32 page_size;
> int ret;
>
> - ret = spi_nor_xread_sr(nor, nor->bouncebuf);
> + ret = xilinx_read_sr(nor, nor->bouncebuf);
> if (ret)
> return ret;
>
> - nor->erase_opcode = SPINOR_OP_XSE;
> - nor->program_opcode = SPINOR_OP_XPP;
> + nor->erase_opcode = XILINX_OP_SE;
> + nor->program_opcode = XILINX_OP_PP;
> nor->read_opcode = SPINOR_OP_READ;
> nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
>
> @@ -155,7 +155,7 @@ static int xilinx_nor_setup(struct spi_nor *nor,
> static void xilinx_late_init(struct spi_nor *nor)
> {
> nor->params->setup = xilinx_nor_setup;
> - nor->params->ready = spi_nor_xsr_ready;
> + nor->params->ready = xilinx_sr_ready;
> }
>
> static const struct spi_nor_fixups xilinx_fixups = {
> --
> 2.30.2
>
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