lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220210074546.30669-2-kavyasree.kotagiri@microchip.com>
Date:   Thu, 10 Feb 2022 13:15:45 +0530
From:   Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
To:     <nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
        <ludovic.desroches@...rochip.com>, <robh+dt@...nel.org>,
        <lee.jones@...aro.org>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <UNGLinuxDriver@...rochip.com>, <Kavyasree.Kotagiri@...rochip.com>,
        <Manohar.Puri@...rochip.com>
Subject: [PATCH 1/2] mfd: dt-bindings: add bindings for lan966 flexcom shared configurations

This adds LAN966 SoC DT bindings documentation for Flexcom
Shared and chip-select configurations.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>
---
 .../devicetree/bindings/mfd/atmel-flexcom.txt        | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
index 692300117c64..a76622082228 100644
--- a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
+++ b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt
@@ -18,6 +18,15 @@ Required properties:
 			- <2> for SPI
 			- <3> for I2C
 
+Optional properties:
+- Flexcom shared configurations: Each flexcom of lan966 SoC has 2 chip selects.
+  For each chip select, there is a pin configuration register.
+  The width of the configuration register is 21 because there are 21 shared
+  pins on each of which the chip select can be mapped. Each bit of the
+  configuration register represents a different FLEXCOM_SHARED pin.
+	- lan966x-ss-pin:	Should be a flexcom shared pin.
+	- lan966x-cs:		Should be chip select 0 or 1.
+
 Required child:
 A single available child device of type matching the "atmel,flexcom-mode"
 property.
@@ -41,6 +50,9 @@ flexcom@...34000 {
 	#size-cells = <1>;
 	ranges = <0x0 0xf8034000 0x800>;
 	atmel,flexcom-mode = <2>;
+	/* Map chip-select index 0 of the flexcom to FLEXCOM_SHARED 9 */
+	lan966x-ss-pin = <9>;
+	lan966x-cs = <0>;
 
 	spi@400 {
 		compatible = "atmel,at91rm9200-spi";
-- 
2.17.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ