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Message-Id: <20220210084335.1979778-4-jian.jiang@nxp.com>
Date: Thu, 10 Feb 2022 16:43:35 +0800
From: Kane Jiang <jian.jiang@....com>
To: Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Steve Longerbeam <slongerbeam@...il.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org
Cc: Kane Jiang <jian.jiang@....com>
Subject: [PATCH 3/3] Add i.MX8MM GPT input capture example.
Cause i.MX GPT dts example cannot match i.MX8 chip series.
So add NXP i.MX8MM chip GPT input capture function example
to yaml file.
Signed-off-by: Kane Jiang <jian.jiang@....com>
---
.../devicetree/bindings/timer/fsl,imxgpt.yaml | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
index a4f51f46b7a1..917c1d9516cc 100644
--- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
+++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml
@@ -58,6 +58,29 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mm-gpt
+ then:
+ properties:
+ reg:
+ maxItems: 2
+ interrupts:
+ maxItems: 2
+ clocks:
+ items:
+ - description: SoC GPT ipg clock
+ - description: SoC GPT per clock
+ - description: SoC GPT osc per clock
+ clock-names:
+ items:
+ - const: ipg
+ - const: per
+ - const: osc_per
+
examples:
- |
#include <dt-bindings/clock/imx27-clock.h>
@@ -70,3 +93,28 @@ examples:
<&clks IMX27_CLK_PER1_GATE>;
clock-names = "ipg", "per";
};
+
+ - |
+ #include <dt-bindings/clock/imx8mm-clock.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pinctrl_gpt_input_capture0: gptinputcapture0grp {
+ fsl,pins = <0x1CC 0x434 0x000 0x1 0x0 0xd6>;
+ };
+
+ gpt1: gpt@...d0000 {
+ compatible = "fsl,imx8mm-gpt";
+ reg = <0x0 0x302d0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MM_CLK_GPT1_ROOT>,
+ <&clk IMX8MM_CLK_GPT1_ROOT>,
+ <&clk IMX8MM_CLK_GPT_3M>;
+ clock-names = "ipg", "per", "osc_per";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpt_input_capture0>;
+ };
+ };
--
2.25.1
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