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Message-Id: <20220210131210.24605-2-jonathan@marek.ca>
Date: Thu, 10 Feb 2022 08:12:09 -0500
From: Jonathan Marek <jonathan@...ek.ca>
To: linux-arm-msm@...r.kernel.org
Cc: dmitry.baryshkov@...aro.org,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <agross@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
linux-gpio@...r.kernel.org (open list:PIN CONTROL SUBSYSTEM),
linux-kernel@...r.kernel.org (open list)
Subject: [PATCH 2/2] pinctrl: qcom: print egpio mode in debugfs
When egpio_enable bit is cleared, the gpio is driven by SSC/LPASS TLMM and
the APSS TLMM settings are ignored. Reflect that in the debugfs dump.
Signed-off-by: Jonathan Marek <jonathan@...ek.ca>
---
drivers/pinctrl/qcom/pinctrl-msm.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 780878dede9e0..27c19a206502d 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -615,6 +615,7 @@ static void msm_gpio_dbg_show_one(struct seq_file *s,
int drive;
int pull;
int val;
+ int egpio_enable;
u32 ctl_reg, io_reg;
static const char * const pulls_keeper[] = {
@@ -641,12 +642,20 @@ static void msm_gpio_dbg_show_one(struct seq_file *s,
func = (ctl_reg >> g->mux_bit) & 7;
drive = (ctl_reg >> g->drv_bit) & 7;
pull = (ctl_reg >> g->pull_bit) & 3;
+ egpio_enable = 0;
+ if (pctrl->soc->egpio_func && ctl_reg & BIT(g->egpio_present))
+ egpio_enable = !(ctl_reg & BIT(g->egpio_enable));
if (is_out)
val = !!(io_reg & BIT(g->out_bit));
else
val = !!(io_reg & BIT(g->in_bit));
+ if (egpio_enable) {
+ seq_printf(s, " %-8s: egpio\n", g->name);
+ return;
+ }
+
seq_printf(s, " %-8s: %-3s", g->name, is_out ? "out" : "in");
seq_printf(s, " %-4s func%d", val ? "high" : "low", func);
seq_printf(s, " %dmA", msm_regval_to_drive(drive));
--
2.26.1
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