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Date:   Thu, 10 Feb 2022 15:31:50 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     qizhong cheng <qizhong.cheng@...iatek.com>,
        Ryder Lee <ryder.lee@...iatek.com>,
        Jianjun Wang <jianjun.wang@...iatek.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>
Cc:     linux-pci@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        stable@...r.kernel.org, chuanjia.liu@...iatek.com
Subject: Re: [PATCH v2] PCI: mediatek: Clear interrupt status before
 dispatching handler

Il 10/02/22 02:21, qizhong cheng ha scritto:
> We found a failure when used iperf tool for wifi performance testing,
> there are some MSIs received while clearing the interrupt status,
> these MSIs cannot be serviced.
> 
> The interrupt status can be cleared even the MSI status still remaining,
> as an edge-triggered interrupts, its interrupt status should be cleared
> before dispatching to the handler of device.
> 
> Signed-off-by: qizhong cheng <qizhong.cheng@...iatek.com>

Hello Qizhong,

This commit is fixing an issue, which means that you *have to* add a proper
Fixes tag.

I believe that this is fixing commit
43e6409db64d ("PCI: mediatek: Add MSI support for MT2712 and MT7622").

Please add the tag and send a v3, after which:
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>


> ---
> v2:
>   - Update the subject line.
>   - Improve the commit log and code comments.
> 
>   drivers/pci/controller/pcie-mediatek.c | 9 +++++++--
>   1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
> index 2f3f974977a3..2856d74b2513 100644
> --- a/drivers/pci/controller/pcie-mediatek.c
> +++ b/drivers/pci/controller/pcie-mediatek.c
> @@ -624,12 +624,17 @@ static void mtk_pcie_intr_handler(struct irq_desc *desc)
>   		if (status & MSI_STATUS){
>   			unsigned long imsi_status;
>   
> +			/*
> +			 * The interrupt status can be cleared even the MSI
> +			 * status still remaining, hence as an edge-triggered
> +			 * interrupts, its interrupt status should be cleared
> +			 * before dispatching handler.
> +			 */
> +			writel(MSI_STATUS, port->base + PCIE_INT_STATUS);
>   			while ((imsi_status = readl(port->base + PCIE_IMSI_STATUS))) {
>   				for_each_set_bit(bit, &imsi_status, MTK_MSI_IRQS_NUM)
>   					generic_handle_domain_irq(port->inner_domain, bit);
>   			}
> -			/* Clear MSI interrupt status */
> -			writel(MSI_STATUS, port->base + PCIE_INT_STATUS);
>   		}
>   	}
>   
> 


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