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Message-ID: <9382f3ca-b49a-e900-7f21-3f10b267ee4a@omp.ru>
Date: Fri, 11 Feb 2022 23:51:22 +0300
From: Sergey Shtylyov <s.shtylyov@....ru>
To: Rich Felker <dalias@...c.org>, <linux-sh@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: Yoshinori Sato <ysato@...rs.sourceforge.jp>
Subject: [PATCH v2] sh: avoid using IRQ0 on SH3/4
Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify
that code to start the IRQ #s from 16 instead.
[1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@omp.ru/
Signed-off-by: Sergey Shtylyov <s.shtylyov@....ru>
---
The patch is against Linus Torvalds' 'linux.git' repo.
Changes in version 2:
- changed cmp/ge to cmp/hs in the assembly code.
arch/sh/kernel/cpu/sh3/entry.S | 4 ++--
include/linux/sh_intc.h | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
Index: linux/arch/sh/kernel/cpu/sh3/entry.S
===================================================================
--- linux.orig/arch/sh/kernel/cpu/sh3/entry.S
+++ linux/arch/sh/kernel/cpu/sh3/entry.S
@@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
mov r4, r0 ! save vector->jmp table offset for later
shlr2 r4 ! vector to IRQ# conversion
- add #-0x10, r4
- cmp/pz r4 ! is it a valid IRQ?
+ mov #0x10, r5
+ cmp/hs r5, r4 ! is it a valid IRQ?
bt 10f
/*
Index: linux/include/linux/sh_intc.h
===================================================================
--- linux.orig/include/linux/sh_intc.h
+++ linux/include/linux/sh_intc.h
@@ -13,9 +13,9 @@
/*
* Convert back and forth between INTEVT and IRQ values.
*/
-#ifdef CONFIG_CPU_HAS_INTEVT
-#define evt2irq(evt) (((evt) >> 5) - 16)
-#define irq2evt(irq) (((irq) + 16) << 5)
+#ifdef CONFIG_CPU_HAS_INTEVT /* Avoid IRQ0 (invalid for platform devices) */
+#define evt2irq(evt) ((evt) >> 5)
+#define irq2evt(irq) ((irq) << 5)
#else
#define evt2irq(evt) (evt)
#define irq2evt(irq) (irq)
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