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Message-ID: <20220211223442.254489-2-Smita.KoralahalliChannabasappa@amd.com>
Date: Fri, 11 Feb 2022 16:34:39 -0600
From: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
To: <x86@...nel.org>, <linux-edac@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: Tony Luck <tony.luck@...el.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"H . Peter Anvin" <hpa@...or.com>,
James Morse <james.morse@....com>,
Robert Richter <rric@...nel.org>,
Yazen Ghannam <yazen.ghannam@....com>,
Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
Subject: [PATCH v3 1/4] x86/mce: Define function to extract ErrorAddr from MCA_ADDR
Move MCA_ADDR[ErrorAddr] extraction into a separate helper function. This
will be further refactored in the next patch.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
Reviewed-by: Yazen Ghannam <yazen.ghannam@....com>
---
Link:
https://lkml.kernel.org/r/20210625013341.231442-1-Smita.KoralahalliChannabasappa@amd.com
v2:
No change.
v3:
Rebased on the latest tip tree. No functional changes.
---
arch/x86/include/asm/mce.h | 2 ++
arch/x86/kernel/cpu/mce/amd.c | 14 +++++++++-----
arch/x86/kernel/cpu/mce/core.c | 7 ++-----
3 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index cc73061e7255..99a4c32cbdfa 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -337,12 +337,14 @@ extern int mce_threshold_remove_device(unsigned int cpu);
void mce_amd_feature_init(struct cpuinfo_x86 *c);
enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank);
+void smca_extract_err_addr(struct mce *m);
#else
static inline int mce_threshold_create_device(unsigned int cpu) { return 0; };
static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; };
static inline bool amd_mce_is_memory_error(struct mce *m) { return false; };
static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
+static inline void smca_extract_err_addr(struct mce *m) { }
#endif
static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); }
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index 1940d305db1c..981d718851a2 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -722,6 +722,13 @@ bool amd_mce_is_memory_error(struct mce *m)
return m->bank == 4 && xec == 0x8;
}
+void smca_extract_err_addr(struct mce *m)
+{
+ u8 lsb = (m->addr >> 56) & 0x3f;
+
+ m->addr &= GENMASK_ULL(55, lsb);
+}
+
static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)
{
struct mce m;
@@ -740,11 +747,8 @@ static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)
* Extract [55:<lsb>] where lsb is the least significant
* *valid* bit of the address bits.
*/
- if (mce_flags.smca) {
- u8 lsb = (m.addr >> 56) & 0x3f;
-
- m.addr &= GENMASK_ULL(55, lsb);
- }
+ if (mce_flags.smca)
+ smca_extract_err_addr(&m);
}
if (mce_flags.smca) {
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 4f1e825033ce..f031f2668523 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -664,11 +664,8 @@ static noinstr void mce_read_aux(struct mce *m, int i)
* Extract [55:<lsb>] where lsb is the least significant
* *valid* bit of the address bits.
*/
- if (mce_flags.smca) {
- u8 lsb = (m->addr >> 56) & 0x3f;
-
- m->addr &= GENMASK_ULL(55, lsb);
- }
+ if (mce_flags.smca)
+ smca_extract_err_addr(m);
}
if (mce_flags.smca) {
--
2.17.1
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