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Message-Id: <20220213133128.5833-2-iam@lach.pw>
Date: Sun, 13 Feb 2022 16:31:28 +0300
From: Yaroslav Bolyukin <iam@...h.pw>
To: linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
amd-gfx@...ts.freedesktop.org
Cc: Thomas Zimmermann <tzimmermann@...e.de>,
Maxime Ripard <mripard@...nel.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Daniel Vetter <daniel@...ll.ch>,
David Airlie <airlied@...ux.ie>,
"Pan, Xinhui" <Xinhui.Pan@....com>,
Christian König <christian.koenig@....com>,
Alex Deucher <alexander.deucher@....com>,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
Leo Li <sunpeng.li@....com>,
Harry Wentland <harry.wentland@....com>,
Yaroslav Bolyukin <iam@...h.pw>
Subject: [PATCH 2/2] drm/amd: use fixed dsc bits-per-pixel from edid
VESA vendor header from DisplayID spec may contain fixed bit per pixel
rate, it should be respected by drm driver
Signed-off-by: Yaroslav Bolyukin <iam@...h.pw>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 ++
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 ++-
drivers/gpu/drm/amd/display/dc/dc_types.h | 3 +++
3 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index 29f07c26d..b34dd89ae 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -118,6 +118,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps(
edid_caps->edid_hdmi = connector->display_info.is_hdmi;
+ edid_caps->dsc_fixed_bits_per_pixel_x16 = connector->display_info.dp_dsc_bpp;
+
sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads);
if (sad_count <= 0)
return result;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
index 57cf4cb82..f8516ec70 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
@@ -105,6 +105,8 @@ static bool dc_stream_construct(struct dc_stream_state *stream,
/* EDID CAP translation for HDMI 2.0 */
stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
+ stream->timing.dsc_fixed_bits_per_pixel_x16 =
+ dc_sink_data->edid_caps.dsc_fixed_bits_per_pixel_x16;
memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
stream->timing.dsc_cfg.num_slices_h = 0;
@@ -738,4 +740,3 @@ void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
"\tlink: %d\n",
stream->link->link_index);
}
-
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 0285a4b38..ce2e11d70 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -227,6 +227,9 @@ struct dc_edid_caps {
bool edid_hdmi;
bool hdr_supported;
+ /* DisplayPort caps */
+ uint32_t dsc_fixed_bits_per_pixel_x16;
+
struct dc_panel_patch panel_patch;
};
--
2.35.1
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