[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAJsYDVLyasPAmgxguqLznORC2SihKHRLrFFw5nHbepJvu0va3Q@mail.gmail.com>
Date: Wed, 16 Feb 2022 00:48:38 +0800
From: Chuanhong Guo <gch981213@...il.com>
To: linux-mips@...r.kernel.org
Cc: Rui Salvaterra <rsalvaterra@...il.com>,
Ilya Lipnitskiy <ilya.lipnitskiy@...il.com>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: ralink: mt7621: do memory detection on KSEG1
Hi!
On Fri, Feb 11, 2022 at 8:14 AM Chuanhong Guo <gch981213@...il.com> wrote:
>
> It's reported that current memory detection code occasionally detects
> larger memory under some bootloaders.
> Current memory detection code tests whether address space wraps around
> on KSEG0, which is unreliable because it's cached.
>
> Rewrite memory size detection to perform the same test on KSEG1 instead.
> While at it, this patch also does the following two things:
> 1. use a fixed pattern instead of a random function pointer as the magic
> value.
> 2. add an additional memory write and a second comparison as part of the
> test to prevent possible smaller memory detection result due to
> leftover values in memory.
>
> Fixes: 139c949f7f0a MIPS: ("ralink: mt7621: add memory detection support")
I misplaced a bracket in this Fixes tag.
> Reported-by: Rui Salvaterra <rsalvaterra@...il.com>
> Signed-off-by: Chuanhong Guo <gch981213@...il.com>
> ---
> arch/mips/ralink/mt7621.c | 36 +++++++++++++++++++++++-------------
> 1 file changed, 23 insertions(+), 13 deletions(-)
>
> diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c
> index d6efffd4dd20..12c8808e0dea 100644
> --- a/arch/mips/ralink/mt7621.c
> +++ b/arch/mips/ralink/mt7621.c
> @@ -22,7 +22,9 @@
>
> #include "common.h"
>
> -static void *detect_magic __initdata = detect_memory_region;
> +#define MT7621_MEM_TEST_PATTERN 0xaa5555aa
> +
> +static u32 detect_magic __initdata;
>
> int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
> {
> @@ -58,24 +60,32 @@ phys_addr_t mips_cpc_default_phys_base(void)
> panic("Cannot detect cpc address");
> }
>
> +static bool __init mt7621_addr_wraparound_test(phys_addr_t size)
> +{
> + void *dm = (void *)KSEG1ADDR(&detect_magic);
> +
> + if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE)
> + return true;
> + __raw_writel(MT7621_MEM_TEST_PATTERN, dm);
> + if (__raw_readl(dm) != __raw_readl(dm + size))
> + return false;
> + __raw_writel(!MT7621_MEM_TEST_PATTERN, dm);
Someone on Github notified me that this second test pattern is incorrect.
I actually mean to use ~MT7621_MEM_TEST_PATTERN here.
I'll send a v2 fixing both issues.
--
Regards,
Chuanhong Guo
Powered by blists - more mailing lists