linux-kernel - RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

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Message-ID: <AS8PR04MB86768072C3451DDC099624CD8C349@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date:   Tue, 15 Feb 2022 05:50:25 +0000
From:   Hongxing Zhu <hongxing.zhu@....com>
To:     Shawn Guo <shawnguo@...nel.org>
CC:     "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "kernel@...gutronix.de" <kernel@...gutronix.de>,
        dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support

> -----Original Message-----
> From: Hongxing Zhu
> Sent: 2022年2月14日 9:19
> To: Shawn Guo <shawnguo@...nel.org>
> Cc: l.stach@...gutronix.de; bhelgaas@...gle.com;
> lorenzo.pieralisi@....com; linux-pci@...r.kernel.org;
> linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> kernel@...gutronix.de; dl-linux-imx <linux-imx@....com>
> Subject: RE: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe support
> 
> > -----Original Message-----
> > From: Shawn Guo <shawnguo@...nel.org>
> > Sent: 2022年2月13日 12:32
> > To: Hongxing Zhu <hongxing.zhu@....com>
> > Cc: l.stach@...gutronix.de; bhelgaas@...gle.com;
> > lorenzo.pieralisi@....com; linux-pci@...r.kernel.org;
> > linux-arm-kernel@...ts.infradead.org; linux-kernel@...r.kernel.org;
> > kernel@...gutronix.de; dl-linux-imx <linux-imx@....com>
> > Subject: Re: [PATCH v2 1/2] ARM: dts: imx6qp-sabresd: Enable PCIe
> > support
> >
> > On Fri, Feb 11, 2022 at 03:32:58PM +0800, Richard Zhu wrote:
> > > In the i.MX6QP sabresd board(sch-28857) design, one external
> > > oscillator is used as the PCIe reference clock source by the endpoint device.
> > >
> > > If RC uses this oscillator as reference clock too, PLL6(ENET PLL)
> > > would has to be in bypass mode, and ENET clocks would be messed up.
> > >
> > > To keep things simple, let RC use the internal PLL as reference
> > > clock and always enable the external oscillator for endpoint device
> > > on i.MX6QP sabresd board.
> > >
> > > NOTE: This reference clock setup is used to pass the GEN2 TX
> > > compliance tests, and isn't recommended as a setup in the end-user design.
> >
> > I do not quite follow.  The commit log is all talking about external
> > oscillator reference clock, while code is playing 'vgen3' regulator.
Hi Shawn:
I added the vgen3 usage description in the commit log, and has sent out the v3
 series.
Please help to take look on it. Thanks in advanced.

Best Regards
Richard Zhu

> Hi Shawn:
> The vgen3 is the power-supply used to power up the external OSC circuit on
> the board.
> Set vgen2 always on to toggle the external OSC and provide the REF clock  for
> EP device once the board is powered up.
> 
> Thanks.
> Best Regards
> Richard
> >
> > Shawn
> >
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > > ---
> > >  arch/arm/boot/dts/imx6qp-sabresd.dts | 8 +++++++-
> > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > index 480e73183f6b..083cf90bcab5 100644
> > > --- a/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > +++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
> > > @@ -50,8 +50,14 @@ MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> > 	0x17059
> > >  	};
> > >  };
> > >
> > > +&vgen3_reg {
> > > +	regulator-min-microvolt = <1800000>;
> > > +	regulator-max-microvolt = <3300000>;
> > > +	regulator-always-on;
> > > +};
> > > +
> > >  &pcie {
> > > -	status = "disabled";
> > > +	status = "okay";
> > >  };
> > >
> > >  &sata {
> > > --
> > > 2.25.1
> > >