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Date: Tue, 15 Feb 2022 14:20:01 +0800
From: Chun-Jie Chen <chun-jie.chen@...iatek.com>
To: Chen-Yu Tsai <wenst@...omium.org>, Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Matthias Brugger <matthias.bgg@...il.com>
CC: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Miles Chen <miles.chen@...iatek.com>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 02/31] clk: mediatek: gate: Consolidate gate type clk
related code
On Tue, 2022-02-08 at 20:40 +0800, Chen-Yu Tsai wrote:
> Right now some bits of the gate type clk code are in clk-gate.[ch],
> but
> other bits are in clk-mtk.[ch]. This is different from the cpumux and
> mux type clks, for which all of the code are found in the same files.
>
> Move the functions that register multiple clks from a given list,
> mtk_clk_register_gates_with_dev() and mtk_clk_register_gates(), to
> clk-gate.[ch] to consolidate all the code for the gate type clks.
>
> This commit only moves code with minor whitespace fixups to correct
> the code style. Further improvements, such as internalizing various
> functions and structures will be done in later commits.
>
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> Reviewed-by: Miles Chen <miles.chen@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> ---
> drivers/clk/mediatek/clk-gate.c | 53
> ++++++++++++++++++++++++++++++++-
> drivers/clk/mediatek/clk-gate.h | 25 ++++++++++++++++
> drivers/clk/mediatek/clk-mtk.c | 51 -------------------------------
> drivers/clk/mediatek/clk-mtk.h | 25 ----------------
> 4 files changed, 77 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-gate.c
> b/drivers/clk/mediatek/clk-gate.c
> index 5d88b428565b..54921768bfba 100644
> --- a/drivers/clk/mediatek/clk-gate.c
> +++ b/drivers/clk/mediatek/clk-gate.c
> @@ -11,9 +11,9 @@
> #include <linux/slab.h>
> #include <linux/delay.h>
> #include <linux/clkdev.h>
> +#include <linux/mfd/syscon.h>
> #include <linux/module.h>
>
> -#include "clk-mtk.h"
> #include "clk-gate.h"
>
> static u32 mtk_get_clockgating(struct clk_hw *hw)
> @@ -182,4 +182,55 @@ struct clk *mtk_clk_register_gate(
> }
> EXPORT_SYMBOL_GPL(mtk_clk_register_gate);
>
> +int mtk_clk_register_gates_with_dev(struct device_node *node,
> + const struct mtk_gate *clks, int
> num,
> + struct clk_onecell_data *clk_data,
> + struct device *dev)
> +{
> + int i;
> + struct clk *clk;
> + struct regmap *regmap;
> +
> + if (!clk_data)
> + return -ENOMEM;
> +
> + regmap = device_node_to_regmap(node);
> + if (IS_ERR(regmap)) {
> + pr_err("Cannot find regmap for %pOF: %pe\n", node,
> regmap);
> + return PTR_ERR(regmap);
> + }
> +
> + for (i = 0; i < num; i++) {
> + const struct mtk_gate *gate = &clks[i];
> +
> + if (!IS_ERR_OR_NULL(clk_data->clks[gate->id]))
> + continue;
> +
> + clk = mtk_clk_register_gate(gate->name, gate-
> >parent_name,
> + regmap,
> + gate->regs->set_ofs,
> + gate->regs->clr_ofs,
> + gate->regs->sta_ofs,
> + gate->shift, gate->ops,
> + gate->flags, dev);
> +
> + if (IS_ERR(clk)) {
> + pr_err("Failed to register clk %s: %pe\n",
> gate->name, clk);
> + continue;
> + }
> +
> + clk_data->clks[gate->id] = clk;
> + }
> +
> + return 0;
> +}
> +
> +int mtk_clk_register_gates(struct device_node *node,
> + const struct mtk_gate *clks, int num,
> + struct clk_onecell_data *clk_data)
> +{
> + return mtk_clk_register_gates_with_dev(node, clks, num,
> clk_data, NULL);
> +}
> +EXPORT_SYMBOL_GPL(mtk_clk_register_gates);
> +
> MODULE_LICENSE("GPL");
> diff --git a/drivers/clk/mediatek/clk-gate.h
> b/drivers/clk/mediatek/clk-gate.h
> index 3c3329ec54b7..432b571d23b3 100644
> --- a/drivers/clk/mediatek/clk-gate.h
> +++ b/drivers/clk/mediatek/clk-gate.h
> @@ -43,6 +43,22 @@ struct clk *mtk_clk_register_gate(
> unsigned long flags,
> struct device *dev);
>
> +struct mtk_gate_regs {
> + u32 sta_ofs;
> + u32 clr_ofs;
> + u32 set_ofs;
> +};
> +
> +struct mtk_gate {
> + int id;
> + const char *name;
> + const char *parent_name;
> + const struct mtk_gate_regs *regs;
> + int shift;
> + const struct clk_ops *ops;
> + unsigned long flags;
> +};
> +
> #define GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, \
> _ops, _flags) { \
> .id = _id, \
> @@ -57,4 +73,13 @@ struct clk *mtk_clk_register_gate(
> #define GATE_MTK(_id, _name, _parent, _regs, _shift, _ops)
> \
> GATE_MTK_FLAGS(_id, _name, _parent, _regs, _shift, _ops, 0)
>
> +int mtk_clk_register_gates(struct device_node *node,
> + const struct mtk_gate *clks, int num,
> + struct clk_onecell_data *clk_data);
> +
> +int mtk_clk_register_gates_with_dev(struct device_node *node,
> + const struct mtk_gate *clks, int
> num,
> + struct clk_onecell_data *clk_data,
> + struct device *dev);
> +
> #endif /* __DRV_CLK_GATE_H */
> diff --git a/drivers/clk/mediatek/clk-mtk.c
> b/drivers/clk/mediatek/clk-mtk.c
> index 519a461cbb6f..0c5db3c71fdd 100644
> --- a/drivers/clk/mediatek/clk-mtk.c
> +++ b/drivers/clk/mediatek/clk-mtk.c
> @@ -106,57 +106,6 @@ void mtk_clk_register_factors(const struct
> mtk_fixed_factor *clks,
> }
> EXPORT_SYMBOL_GPL(mtk_clk_register_factors);
>
> -int mtk_clk_register_gates_with_dev(struct device_node *node,
> - const struct mtk_gate *clks,
> - int num, struct clk_onecell_data *clk_data,
> - struct device *dev)
> -{
> - int i;
> - struct clk *clk;
> - struct regmap *regmap;
> -
> - if (!clk_data)
> - return -ENOMEM;
> -
> - regmap = device_node_to_regmap(node);
> - if (IS_ERR(regmap)) {
> - pr_err("Cannot find regmap for %pOF: %pe\n", node,
> regmap);
> - return PTR_ERR(regmap);
> - }
> -
> - for (i = 0; i < num; i++) {
> - const struct mtk_gate *gate = &clks[i];
> -
> - if (!IS_ERR_OR_NULL(clk_data->clks[gate->id]))
> - continue;
> -
> - clk = mtk_clk_register_gate(gate->name, gate-
> >parent_name,
> - regmap,
> - gate->regs->set_ofs,
> - gate->regs->clr_ofs,
> - gate->regs->sta_ofs,
> - gate->shift, gate->ops, gate->flags,
> dev);
> -
> - if (IS_ERR(clk)) {
> - pr_err("Failed to register clk %s: %pe\n",
> gate->name, clk);
> - continue;
> - }
> -
> - clk_data->clks[gate->id] = clk;
> - }
> -
> - return 0;
> -}
> -
> -int mtk_clk_register_gates(struct device_node *node,
> - const struct mtk_gate *clks,
> - int num, struct clk_onecell_data *clk_data)
> -{
> - return mtk_clk_register_gates_with_dev(node,
> - clks, num, clk_data, NULL);
> -}
> -EXPORT_SYMBOL_GPL(mtk_clk_register_gates);
> -
> struct clk *mtk_clk_register_composite(const struct mtk_composite
> *mc,
> void __iomem *base, spinlock_t *lock)
> {
> diff --git a/drivers/clk/mediatek/clk-mtk.h
> b/drivers/clk/mediatek/clk-mtk.h
> index 0ff289d93452..bdec7dc5e07a 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -150,31 +150,6 @@ void mtk_clk_register_composites(const struct
> mtk_composite *mcs,
> int num, void __iomem *base, spinlock_t *lock,
> struct clk_onecell_data *clk_data);
>
> -struct mtk_gate_regs {
> - u32 sta_ofs;
> - u32 clr_ofs;
> - u32 set_ofs;
> -};
> -
> -struct mtk_gate {
> - int id;
> - const char *name;
> - const char *parent_name;
> - const struct mtk_gate_regs *regs;
> - int shift;
> - const struct clk_ops *ops;
> - unsigned long flags;
> -};
> -
> -int mtk_clk_register_gates(struct device_node *node,
> - const struct mtk_gate *clks, int num,
> - struct clk_onecell_data *clk_data);
> -
> -int mtk_clk_register_gates_with_dev(struct device_node *node,
> - const struct mtk_gate *clks,
> - int num, struct clk_onecell_data *clk_data,
> - struct device *dev);
> -
> struct mtk_clk_divider {
> int id;
> const char *name;
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