[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <3062ed3573797e18997ac4fc9d37a898056fdf59.camel@mediatek.com>
Date: Tue, 15 Feb 2022 15:05:56 +0800
From: Chun-Jie Chen <chun-jie.chen@...iatek.com>
To: Chen-Yu Tsai <wenst@...omium.org>, Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Matthias Brugger <matthias.bgg@...il.com>
CC: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Miles Chen <miles.chen@...iatek.com>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 25/31] clk: mediatek: pll: Implement error handling
in register API
On Tue, 2022-02-08 at 20:40 +0800, Chen-Yu Tsai wrote:
> The pll clk type registration function does not stop or return errors
> if any clk failed to be registered, nor does it implement an error
> handling path. This may result in a partially working device if any
> step failed.
>
> Make the register function return proper error codes, and bail out if
> errors occur. Proper cleanup, i.e. unregister any clks that were
> successfully registered, and unmap the I/O space, is done in the new
> error path.
>
> Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
> Reviewed-by: Miles Chen <miles.chen@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
> ---
> drivers/clk/mediatek/clk-pll.c | 23 +++++++++++++++++++----
> drivers/clk/mediatek/clk-pll.h | 6 +++---
> 2 files changed, 22 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-pll.c
> b/drivers/clk/mediatek/clk-pll.c
> index 8439d37e354d..817a80293bfc 100644
> --- a/drivers/clk/mediatek/clk-pll.c
> +++ b/drivers/clk/mediatek/clk-pll.c
> @@ -377,8 +377,9 @@ static void mtk_clk_unregister_pll(struct clk
> *clk)
> kfree(pll);
> }
>
> -void mtk_clk_register_plls(struct device_node *node,
> - const struct mtk_pll_data *plls, int num_plls, struct
> clk_onecell_data *clk_data)
> +int mtk_clk_register_plls(struct device_node *node,
> + const struct mtk_pll_data *plls, int
> num_plls,
> + struct clk_onecell_data *clk_data)
> {
> void __iomem *base;
> int i;
> @@ -387,7 +388,7 @@ void mtk_clk_register_plls(struct device_node
> *node,
> base = of_iomap(node, 0);
> if (!base) {
> pr_err("%s(): ioremap failed\n", __func__);
> - return;
> + return -EINVAL;
> }
>
> for (i = 0; i < num_plls; i++) {
> @@ -397,11 +398,25 @@ void mtk_clk_register_plls(struct device_node
> *node,
>
> if (IS_ERR(clk)) {
> pr_err("Failed to register clk %s: %pe\n", pll-
> >name, clk);
> - continue;
> + goto err;
> }
>
> clk_data->clks[pll->id] = clk;
> }
> +
> + return 0;
> +
> +err:
> + while (--i >= 0) {
> + const struct mtk_pll_data *pll = &plls[i];
> +
> + mtk_clk_unregister_pll(clk_data->clks[pll->id]);
> + clk_data->clks[pll->id] = ERR_PTR(-ENOENT);
> + }
> +
> + iounmap(base);
> +
> + return PTR_ERR(clk);
> }
> EXPORT_SYMBOL_GPL(mtk_clk_register_plls);
>
> diff --git a/drivers/clk/mediatek/clk-pll.h
> b/drivers/clk/mediatek/clk-pll.h
> index a889b1e472e7..bf06e44caef9 100644
> --- a/drivers/clk/mediatek/clk-pll.h
> +++ b/drivers/clk/mediatek/clk-pll.h
> @@ -48,9 +48,9 @@ struct mtk_pll_data {
> u8 pll_en_bit; /* Assume 0, indicates BIT(0) by default */
> };
>
> -void mtk_clk_register_plls(struct device_node *node,
> - const struct mtk_pll_data *plls, int
> num_plls,
> - struct clk_onecell_data *clk_data);
> +int mtk_clk_register_plls(struct device_node *node,
> + const struct mtk_pll_data *plls, int
> num_plls,
> + struct clk_onecell_data *clk_data);
> void mtk_clk_unregister_plls(const struct mtk_pll_data *plls, int
> num_plls,
> struct clk_onecell_data *clk_data);
>
Powered by blists - more mailing lists