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Message-ID: <164492246651.16921.17243295814818323213.tip-bot2@tip-bot2>
Date: Tue, 15 Feb 2022 10:54:26 -0000
From: "tip-bot2 for Fenghua Yu" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Fenghua Yu <fenghua.yu@...el.com>, Borislav Petkov <bp@...e.de>,
Tony Luck <tony.luck@...el.com>,
Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/pasid] x86/cpufeatures: Re-enable ENQCMD
The following commit has been merged into the x86/pasid branch of tip:
Commit-ID: 7c1ef59145f1c8bf9a2cc7a6ebf2fd56bbb440de
Gitweb: https://git.kernel.org/tip/7c1ef59145f1c8bf9a2cc7a6ebf2fd56bbb440de
Author: Fenghua Yu <fenghua.yu@...el.com>
AuthorDate: Mon, 07 Feb 2022 15:02:52 -08:00
Committer: Borislav Petkov <bp@...e.de>
CommitterDate: Tue, 15 Feb 2022 11:31:43 +01:00
x86/cpufeatures: Re-enable ENQCMD
The ENQCMD feature can only be used if CONFIG_INTEL_IOMMU_SVM is set.
Add X86_FEATURE_ENQCMD to the disabled features mask as appropriate so
that cpu_feature_enabled() can be used to check the feature.
[ bp: Massage commit message. ]
Signed-off-by: Fenghua Yu <fenghua.yu@...el.com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Reviewed-by: Tony Luck <tony.luck@...el.com>
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
Link: https://lore.kernel.org/r/20220207230254.3342514-10-fenghua.yu@intel.com
---
arch/x86/include/asm/disabled-features.h | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/disabled-features.h b/arch/x86/include/asm/disabled-features.h
index 8f28faf..1231d63 100644
--- a/arch/x86/include/asm/disabled-features.h
+++ b/arch/x86/include/asm/disabled-features.h
@@ -56,8 +56,11 @@
# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
#endif
-/* Force disable because it's broken beyond repair */
-#define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
+#ifdef CONFIG_INTEL_IOMMU_SVM
+# define DISABLE_ENQCMD 0
+#else
+# define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
+#endif
#ifdef CONFIG_X86_SGX
# define DISABLE_SGX 0
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