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Message-ID: <20220215121103.vhb2lpoygxn3xywy@guptapa-mobl1.amr.corp.intel.com>
Date: Tue, 15 Feb 2022 04:11:03 -0800
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Borislav Petkov <bp@...en8.de>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>, Andi Kleen <ak@...ux.intel.com>,
Tony Luck <tony.luck@...el.com>, linux-kernel@...r.kernel.org,
antonio.gomez.iglesias@...ux.intel.com, neelima.krishnan@...el.com,
stable@...r.kernel.org
Subject: Re: [PATCH] x86/tsx: Use MSR_TSX_CTRL to clear CPUID bits
On 15.02.2022 11:24, Borislav Petkov wrote:
>On Mon, Feb 14, 2022 at 04:20:14PM -0800, Pawan Gupta wrote:
>> ... we are calling tsx_clear_cpuid() unconditionally.
>
>I know, that's why I asked...
>
>> > If those CPUs which support only disabling TSX through MSR_IA32_TSX_CTRL
>> > but don't have MSR_TSX_FORCE_ABORT - if those CPUs set
>> > X86_FEATURE_RTM_ALWAYS_ABORT too, then this should work.
>
>... this^^.
>
>IOW, what are you fixing here exactly?
>
>Let's look at the two callsites of tsx_clear_cpuid():
>
>1. tsx_init: that will do something on X86_FEATURE_RTM_ALWAYS_ABORT CPUs.
>
>2. init_intel: that will get called when
>
> tsx_ctrl_state == TSX_CTRL_RTM_ALWAYS_ABORT
>
>But TSX_CTRL_RTM_ALWAYS_ABORT gets set only when
>X86_FEATURE_RTM_ALWAYS_ABORT is set. I.e., the first case, in
>tsx_init().
>
>So, IIUC, you wanna fix the case where CPUs which set
>X86_FEATURE_RTM_ALWAYS_ABORT but *don't* have MSR_TSX_FORCE_ABORT, those
>CPUs should still disable TSX through MSR_IA32_TSX_CTRL.
>
>Correct?
That is exactly what this patch is fixing. Please let me know if you
have any questions.
Thanks,
Pawan
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