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Message-ID: <20220215131952.27861-1-rex-bc.chen@mediatek.com>
Date:   Tue, 15 Feb 2022 21:19:50 +0800
From:   Rex-BC Chen <rex-bc.chen@...iatek.com>
To:     <matthias.bgg@...il.com>
CC:     <chunkuang.hu@...nel.org>, <jitao.shi@...iatek.com>,
        <xinlei.lee@...iatek.com>, <enric.balletbo@...labora.com>,
        <angelogioacchino.delregno@...labora.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Rex-BC Chen <rex-bc.chen@...iatek.com>
Subject: [0/2] Add mmsys reset control for MT8186

This series is based on mmsys patch for MT8186 on [1].
[1]: https://patchwork.kernel.org/project/linux-mediatek/patch/20220215075953.3310-4-rex-bc.chen@mediatek.com/

v1
1. Add a new variable in mmsys driver data to control different register offset for different SoCs.
2. Add MT8183 reset register offset.
3. Add mmsys reset control for MT8186.

Rex-BC Chen (2):
  soc: mediatek: mmsys: add sw0_rst_offset in mmsys driver data
  soc: mediatek: mmsys: add mmsys reset control for MT8186

 drivers/soc/mediatek/mt8183-mmsys.h | 2 ++
 drivers/soc/mediatek/mt8186-mmsys.h | 2 ++
 drivers/soc/mediatek/mtk-mmsys.c    | 7 +++++--
 drivers/soc/mediatek/mtk-mmsys.h    | 3 +--
 4 files changed, 10 insertions(+), 4 deletions(-)

-- 
2.18.0

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