[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220216212433.1373903-4-luca@z3ntu.xyz>
Date: Wed, 16 Feb 2022 22:24:30 +0100
From: Luca Weiss <luca@...tu.xyz>
To: linux-arm-msm@...r.kernel.org
Cc: ~postmarketos/upstreaming@...ts.sr.ht, phone-devel@...r.kernel.org,
Luca Weiss <luca@...tu.xyz>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 3/5] ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes
Also remove the pinctrl from qcom-apq8026-lg-lenok as it is the same
value as the generic pinctrl.
Signed-off-by: Luca Weiss <luca@...tu.xyz>
---
arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts | 17 ------
arch/arm/boot/dts/qcom-msm8226.dtsi | 57 +++++++++++++++++++++
2 files changed, 57 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
index 1519544029e7..5ce42dd962c4 100644
--- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
+++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
@@ -204,9 +204,6 @@ &sdhc_1 {
bus-width = <8>;
non-removable;
-
- pinctrl-names = "default";
- pinctrl-0 = <&sdhc1_pin_a>;
};
&smbb {
@@ -219,20 +216,6 @@ &smbb {
};
&tlmm {
- sdhc1_pin_a: sdhc1-pin-active {
- clk {
- pins = "sdc1_clk";
- drive-strength = <10>;
- bias-disable;
- };
-
- cmd-data {
- pins = "sdc1_cmd", "sdc1_data";
- drive-strength = <10>;
- bias-pull-up;
- };
- };
-
touch_pins: touch {
irq {
pins = "gpio17";
diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 103c0ab70814..dfeb47eb41a2 100644
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -116,6 +116,8 @@ sdhc_1: sdhci@...24900 {
<&gcc GCC_SDCC1_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc1_default_state>;
status = "disabled";
};
@@ -130,6 +132,8 @@ sdhc_2: sdhci@...a4900 {
<&gcc GCC_SDCC2_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc2_default_state>;
status = "disabled";
};
@@ -144,6 +148,8 @@ sdhc_3: sdhci@...64900 {
<&gcc GCC_SDCC3_AHB_CLK>,
<&xo_board>;
clock-names = "core", "iface", "xo";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhc3_default_state>;
status = "disabled";
};
@@ -320,6 +326,57 @@ blsp1_i2c5_pins: blsp1-i2c5 {
drive-strength = <2>;
bias-disable;
};
+
+ sdhc1_default_state: sdhc1-default-state {
+ clk {
+ pins = "sdc1_clk";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ cmd-data {
+ pins = "sdc1_cmd", "sdc1_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc2_default_state: sdhc2-default-state {
+ clk {
+ pins = "sdc2_clk";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ cmd-data {
+ pins = "sdc2_cmd", "sdc2_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+ };
+
+ sdhc3_default_state: sdhc3-default-state {
+ clk {
+ pins = "gpio44";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-disable;
+ };
+
+ cmd {
+ pins = "gpio43";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ data {
+ pins = "gpio39", "gpio40", "gpio41", "gpio42";
+ function = "sdc3";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+ };
};
restart@...ab000 {
--
2.35.1
Powered by blists - more mailing lists