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Message-Id: <20220216014028.8123-7-jon.lin@rock-chips.com>
Date: Wed, 16 Feb 2022 09:40:28 +0800
From: Jon Lin <jon.lin@...k-chips.com>
To: broonie@...nel.org
Cc: heiko@...ech.de, linux-spi@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Jon Lin <jon.lin@...k-chips.com>
Subject: [PATCH v3 6/6] spi: rockchip: clear interrupt status in error handler
The interrupt status bit of the previous error data transmition will
affect the next operation and cause continuous SPI transmission failure.
Signed-off-by: Jon Lin <jon.lin@...k-chips.com>
---
Changes in v3: None
Changes in v2: None
Changes in v1: None
drivers/spi/spi-rockchip.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 8b4d56ee2193..cdc16eecaf6b 100644
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -278,8 +278,9 @@ static void rockchip_spi_handle_err(struct spi_controller *ctlr,
*/
spi_enable_chip(rs, false);
- /* make sure all interrupts are masked */
+ /* make sure all interrupts are masked and status cleared */
writel_relaxed(0, rs->regs + ROCKCHIP_SPI_IMR);
+ writel_relaxed(0xffffffff, rs->regs + ROCKCHIP_SPI_ICR);
if (atomic_read(&rs->state) & TXDMA)
dmaengine_terminate_async(ctlr->dma_tx);
--
2.17.1
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