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Message-ID: <CAJ9a7Vj2eZOD-2v5Y+CPgBZiDsAw39N8YFK3xX4sozc1Rs1D=Q@mail.gmail.com>
Date: Thu, 17 Feb 2022 17:35:02 +0000
From: Mike Leach <mike.leach@...aro.org>
To: Mao Jinlong <quic_jinlmao@...cinc.com>
Cc: Mathieu Poirier <mathieu.poirier@...aro.org>,
Suzuki K Poulose <suzuki.poulose@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Leo Yan <leo.yan@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Tingwei Zhang <quic_tingweiz@...cinc.com>,
Yuanfang Zhang <quic_yuanfang@...cinc.com>,
Tao Zhang <quic_taozha@...cinc.com>,
Trilok Soni <quic_tsoni@...cinc.com>,
Hao Zhang <quic_hazha@...cinc.com>,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3 02/10] coresight: Use bitmap to assign trace id to the sources
Hi,
On Wed, 9 Feb 2022 at 10:57, Mao Jinlong <quic_jinlmao@...cinc.com> wrote:
>
> Except from STM and ETM/ETE, there could be other sources. Each
> source needs a unique trace id. Define a bitmap for the trace ids.
> The position of each bit represents trace id of the source.
>
> Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
> ---
> drivers/hwtracing/coresight/coresight-core.c | 48 ++++++++++++++++++++
> include/linux/coresight-pmu.h | 11 +++++
> 2 files changed, 59 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
> index a90097f88425..6cb55c3f41d5 100644
> --- a/drivers/hwtracing/coresight/coresight-core.c
> +++ b/drivers/hwtracing/coresight/coresight-core.c
> @@ -16,6 +16,7 @@
> #include <linux/mutex.h>
> #include <linux/clk.h>
> #include <linux/coresight.h>
> +#include <linux/coresight-pmu.h>
see my comment below about using coresigh-priv.h
> #include <linux/of_platform.h>
> #include <linux/delay.h>
> #include <linux/pm_runtime.h>
> @@ -25,8 +26,11 @@
> #include "coresight-syscfg.h"
>
> static DEFINE_MUTEX(coresight_mutex);
> +static DEFINE_MUTEX(coresight_id_mutex);
> static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
>
> +static DECLARE_BITMAP(coresight_trace_id, CORESIGHT_TRACE_ID_NUM);
> +
> /*
> * Use IDR to map the hash length of the source's device name
> * to the pointer of path for the source
> @@ -51,6 +55,48 @@ struct coresight_node {
> const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
> EXPORT_SYMBOL_GPL(coresight_barrier_pkt);
>
> +/* Init the coresight_trace_id bit map. */
> +static void coresight_init_trace_id(void)
> +{
> + int i;
> +
> + /* Trace id 0 is invalid. */
> + set_bit(CORESIGHT_TRACE_ID_0, coresight_trace_id);
> + /* Trace id 1 is fixed for STM. */
> + set_bit(CORESIGHT_TRACE_ID_1, coresight_trace_id);
> + /* Trace id from 112 to 127 are reserved. */
> + for (i = CORESIGHT_TRACE_ID_112; i <= CORESIGHT_TRACE_ID_127; i++)
> + set_bit(i, coresight_trace_id);
> + /* Skip the trace ids of ETM/ETE. */
> + for (i = 0; i <= cpumask_last(cpu_possible_mask); i++)
> + set_bit(coresight_get_trace_id(i), coresight_trace_id);
> +
> +}
> +
> +/*
> + * Return the first zero bit position of bitmap coresight_trace_id
> + * as source's trace id.
> + *
> + */
> +int coresight_get_system_trace_id(void)
> +{
> + int id;
> +
> + mutex_lock(&coresight_id_mutex);
> + id = find_first_zero_bit(coresight_trace_id, CORESIGHT_TRACE_ID_NUM);
> + /* If no zero bit is found, return error value. */
> + if (id == CORESIGHT_TRACE_ID_NUM) {
> + mutex_unlock(&coresight_id_mutex);
> + return -EINVAL;
> + }
> +
> + set_bit(id, coresight_trace_id);
> + mutex_unlock(&coresight_id_mutex);
> +
> + return id;
> +}
> +EXPORT_SYMBOL(coresight_get_system_trace_id);
> +
> static const struct cti_assoc_op *cti_assoc_ops;
>
> void coresight_set_cti_ops(const struct cti_assoc_op *cti_op)
> @@ -1750,6 +1796,8 @@ static int __init coresight_init(void)
> return 0;
>
> etm_perf_exit();
> +
> + coresight_init_trace_id();
> exit_bus_unregister:
> bus_unregister(&coresight_bustype);
> return ret;
> diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h
> index 4ac5c081af93..1e2c5ca4c6e6 100644
> --- a/include/linux/coresight-pmu.h
> +++ b/include/linux/coresight-pmu.h
> @@ -32,6 +32,14 @@
> #define ETM4_CFG_BIT_RETSTK 12
> #define ETM4_CFG_BIT_VMID_OPT 15
>
The following additional defines and function should appear in coresight-priv.h
The coresight-pmu.h file contains data for the interface between the
drivers and perf.
> +/* Coresight component supports 7 bits trace id. */
additional comment here to explain that 0, 0x70- 0x7F IDs are reserved
by the architecture, 1 is default for STM
> +#define CORESIGHT_TRACE_ID_NUM 128
> +
> +#define CORESIGHT_TRACE_ID_0 0
> +#define CORESIGHT_TRACE_ID_1 1
> +#define CORESIGHT_TRACE_ID_112 112
> +#define CORESIGHT_TRACE_ID_127 127
> +
can we have these names a little more descriptive -
e.g.
CORESIGHT_TRACE_ID_0_RES 0
CORESIGHT_TRACE_ID_STM 1
CORESIGHT_TRACE_ID_RANGE_LO_RES 0x70
CORESIGHT_TRACE_ID_RANGE_HI_RES 0x7F
Additionally - now we are declaring a #define for the STM ID - it
would be better to use that in coresight-stm.c stm_init_default_data()
to set the trace id for the STM.
Regards
Mike
> static inline int coresight_get_trace_id(int cpu)
> {
> /*
> @@ -43,4 +51,7 @@ static inline int coresight_get_trace_id(int cpu)
> return (CORESIGHT_ETM_PMU_SEED + (cpu * 2));
> }
>
> +/* Get the trace id for the sources except from STM, ETM/ETE. */
> +extern int coresight_get_system_trace_id(void);
> +
> #endif
> --
> 2.17.1
>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
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