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Message-ID: <20220217135645.1427466-11-eugen.hristev@microchip.com>
Date: Thu, 17 Feb 2022 15:56:42 +0200
From: Eugen Hristev <eugen.hristev@...rochip.com>
To: <linux-media@...r.kernel.org>, <jacopo@...ndi.org>,
<hverkuil-cisco@...all.nl>, <nicolas.ferre@...rochip.com>
CC: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<claudiu.beznea@...rochip.com>,
"Eugen Hristev" <eugen.hristev@...rochip.com>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v5 10/13] dt-bindings: media: microchip,xisc: add bus-width of 14
The Microchip XISC supports a bus width of 14 bits.
Add it to the supported bus widths.
Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>
Acked-by: Rob Herring <robh@...nel.org>
---
Documentation/devicetree/bindings/media/microchip,xisc.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/media/microchip,xisc.yaml b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
index 086e1430af4f..3be8f64c3e21 100644
--- a/Documentation/devicetree/bindings/media/microchip,xisc.yaml
+++ b/Documentation/devicetree/bindings/media/microchip,xisc.yaml
@@ -67,7 +67,7 @@ properties:
remote-endpoint: true
bus-width:
- enum: [8, 9, 10, 11, 12]
+ enum: [8, 9, 10, 11, 12, 14]
default: 12
hsync-active:
--
2.25.1
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