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Message-ID: <Yg992OrUbfmtRizs@zn.tnic>
Date: Fri, 18 Feb 2022 12:07:04 +0100
From: Borislav Petkov <bp@...en8.de>
To: "Luck, Tony" <tony.luck@...el.com>,
Smita Koralahalli <Smita.KoralahalliChannabasappa@....com>
Cc: x86@...nel.org, linux-edac@...r.kernel.org,
linux-kernel@...r.kernel.org, "H . Peter Anvin" <hpa@...or.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Yazen Ghannam <yazen.ghannam@....com>
Subject: Re: [RFC PATCH 1/2] x86/mce: Handle AMD threshold interrupt storms
On Thu, Feb 17, 2022 at 09:28:09AM -0800, Luck, Tony wrote:
> I've been sitting on some partially done patches to re-work
> storm handling for Intel ... which rips out all the existing
> storm bits and replaces with something all new. I'll post the
> 2-part series as replies to this.
Which begs the obvious question: how much of that code can be shared
between the two?
--
Regards/Gruss,
Boris.
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