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Message-ID: <3158f868-7ee2-660d-9952-174d33265060@collabora.com>
Date: Fri, 18 Feb 2022 13:55:25 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Rob Herring <robh+dt@...nel.org>,
--to=Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc: Project_Global_Chrome_Upstream_Group@...iatek.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
Chen-Yu Tsai <wenst@...omium.org>,
Ryder Lee <ryder.lee@...nel.org>,
NĂcolas F. R. A. Prado
<nfraprado@...labora.com>
Subject: Re: [PATCH v2 02/23] arm64: dts: mt8192: Add pwrap node
Il 18/02/22 10:16, Allen-KH Cheng ha scritto:
> Add pwrap node for mt8192 SoC.
>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index f10a9c75b20c..f58a13b10916 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -523,6 +523,18 @@
> clock-names = "clk13m";
> };
>
> + pwrap: pwrap@...26000 {
> + compatible = "mediatek,mt6873-pwrap";
> + reg = <0 0x10026000 0 0x1000>;
> + reg-names = "pwrap";
> + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&infracfg CLK_INFRA_PMIC_AP>,
> + <&infracfg CLK_INFRA_PMIC_TMR>;
> + clock-names = "spi", "wrap";
> + assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
> + assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
> + };
> +
> scp_adsp: clock-controller@...20000 {
> compatible = "mediatek,mt8192-scp_adsp";
> reg = <0 0x10720000 0 0x1000>;
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