linux-kernel - Re: [PATCH v2 06/23] arm64: dts: mt8192: Add usb-phy node

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Message-ID: <7ce0bf47-b0c9-b6e6-92f3-b7a11b3adfd5@collabora.com>
Date:   Fri, 18 Feb 2022 13:55:31 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        --to=Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
Cc:     Project_Global_Chrome_Upstream_Group@...iatek.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        Chen-Yu Tsai <wenst@...omium.org>,
        Ryder Lee <ryder.lee@...nel.org>,
        Nícolas F. R. A. Prado 
        <nfraprado@...labora.com>
Subject: Re: [PATCH v2 06/23] arm64: dts: mt8192: Add usb-phy node

Il 18/02/22 10:16, Allen-KH Cheng ha scritto:
> Add xhci node for mt8192 SoC.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8192.dtsi | 25 ++++++++++++++++++++++++
>   1 file changed, 25 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 61aadd7bd397..ce18d692175f 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -875,6 +875,31 @@
>   			#clock-cells = <1>;
>   		};
>   
> +		u3phy0: usb-phy@...40000 {
> +			compatible = "mediatek,mt8192-tphy",
> +				     "mediatek,generic-tphy-v2";
> +			#address-cells = <2>;
> +			#size-cells = <2>;
> +			ranges;

This can be better:
			#address-cells = <1>;

			#size-cells = <1>;
			ranges = <0 0 0x11e40000 0x1000>


> +			status = "okay";
> +
> +			u2port0: usb-phy@...40000 {

			u2port0: usb-phy@0 {

> +				reg = <0 0x11e40000 0 0x700>;

				reg = <0x0 0x700>;

> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "okay";
> +			};
> +
> +			u3port0: usb-phy@...40700 {
> +				reg = <0 0x11e40700 0 0x900>;

			u3port0: usb-phy@700 {
				reg = <0x700 0x900>;

> +				clocks = <&clk26m>;
> +				clock-names = "ref";
> +				#phy-cells = <1>;
> +				status = "okay";
> +			};
> +		};
> +
>   		i2c0: i2c@...00000 {
>   			compatible = "mediatek,mt8192-i2c";
>   			reg = <0 0x11f00000 0 0x1000>,

Thanks,
Angelo