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Date: Fri, 18 Feb 2022 15:54:19 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Jiaxin Yu <jiaxin.yu@...iatek.com>, broonie@...nel.org
Cc: lgirdwood@...il.com, tiwai@...e.com, robh+dt@...nel.org,
matthias.bgg@...il.com, perex@...ex.cz, p.zabel@...gutronix.de,
geert+renesas@...der.be, trevor.wu@...iatek.com,
tzungbi@...gle.com, aaronyu@...gle.com, zhangqilong3@...wei.com,
alsa-devel@...a-project.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [v2 05/17] ASoC: mediatek: mt8186: support hw gain in platform
driver
Il 17/02/22 14:41, Jiaxin Yu ha scritto:
> This path adds mt8186 hw gain dai driver.
>
> Signed-off-by: Jiaxin Yu <jiaxin.yu@...iatek.com>
> ---
> .../soc/mediatek/mt8186/mt8186-dai-hw-gain.c | 245 ++++++++++++++++++
> 1 file changed, 245 insertions(+)
> create mode 100644 sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c
>
> diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c b/sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c
> new file mode 100644
> index 000000000000..796878989727
> --- /dev/null
> +++ b/sound/soc/mediatek/mt8186/mt8186-dai-hw-gain.c
> @@ -0,0 +1,245 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// MediaTek ALSA SoC Audio DAI HW Gain Control
> +//
> +// Copyright (c) 2022 MediaTek Inc.
> +// Author: Jiaxin Yu <jiaxin.yu@...iatek.com>
> +
> +#include <linux/regmap.h>
> +#include "mt8186-afe-common.h"
> +#include "mt8186-interconnection.h"
> +
> +#define HW_GAIN_1_EN_W_NAME "HW GAIN 1 Enable"
> +#define HW_GAIN_2_EN_W_NAME "HW GAIN 2 Enable"
> +
> +/* dai component */
> +static const struct snd_kcontrol_new mtk_hw_gain1_in_ch1_mix[] = {
> + SOC_DAPM_SINGLE_AUTODISABLE("CONNSYS_I2S_CH1 Switch", AFE_CONN13_1,
> + I_CONNSYS_I2S_CH1, 1, 0),
> +};
> +
> +static const struct snd_kcontrol_new mtk_hw_gain1_in_ch2_mix[] = {
> + SOC_DAPM_SINGLE_AUTODISABLE("CONNSYS_I2S_CH2 Switch", AFE_CONN14_1,
> + I_CONNSYS_I2S_CH2, 1, 0),
> +};
> +
> +static const struct snd_kcontrol_new mtk_hw_gain2_in_ch1_mix[] = {
> + SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN15,
> + I_ADDA_UL_CH1, 1, 0),
> +};
> +
> +static const struct snd_kcontrol_new mtk_hw_gain2_in_ch2_mix[] = {
> + SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN16,
> + I_ADDA_UL_CH2, 1, 0),
> +};
> +
> +static int mtk_hw_gain_event(struct snd_soc_dapm_widget *w,
> + struct snd_kcontrol *kcontrol,
> + int event)
> +{
> + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
> + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
> + unsigned int gain_cur;
> + unsigned int gain_con1;
> +
> + dev_dbg(cmpnt->dev, "%s(), name %s, event 0x%x\n",
> + __func__, w->name, event);
> +
> + switch (event) {
> + case SND_SOC_DAPM_PRE_PMU:
> + if (strcmp(w->name, HW_GAIN_1_EN_W_NAME) == 0) {
> + gain_cur = AFE_GAIN1_CUR;
> + gain_con1 = AFE_GAIN1_CON1;
> + } else {
> + gain_cur = AFE_GAIN2_CUR;
> + gain_con1 = AFE_GAIN2_CON1;
> + }
> +
> + /* let hw gain ramp up, set cur gain to 0 */
> + regmap_update_bits(afe->regmap,
> + gain_cur,
> + AFE_GAIN1_CUR_MASK_SFT,
> + 0);
This fits in one line (86 columns is ok)
> +
> + /* set target gain to 0 */
> + regmap_update_bits(afe->regmap,
> + gain_con1,
> + GAIN1_TARGET_MASK_SFT,
> + 0);
Same here.
> + break;
> + default:
> + break;
> + }
> +
> + return 0;
> +}
> +
> +static const struct snd_soc_dapm_widget mtk_dai_hw_gain_widgets[] = {
> + /* inter-connections */
> + SND_SOC_DAPM_MIXER("HW_GAIN1_IN_CH1", SND_SOC_NOPM, 0, 0,
> + mtk_hw_gain1_in_ch1_mix,
> + ARRAY_SIZE(mtk_hw_gain1_in_ch1_mix)),
> + SND_SOC_DAPM_MIXER("HW_GAIN1_IN_CH2", SND_SOC_NOPM, 0, 0,
> + mtk_hw_gain1_in_ch2_mix,
> + ARRAY_SIZE(mtk_hw_gain1_in_ch2_mix)),
> + SND_SOC_DAPM_MIXER("HW_GAIN2_IN_CH1", SND_SOC_NOPM, 0, 0,
> + mtk_hw_gain2_in_ch1_mix,
> + ARRAY_SIZE(mtk_hw_gain2_in_ch1_mix)),
> + SND_SOC_DAPM_MIXER("HW_GAIN2_IN_CH2", SND_SOC_NOPM, 0, 0,
> + mtk_hw_gain2_in_ch2_mix,
> + ARRAY_SIZE(mtk_hw_gain2_in_ch2_mix)),
> +
> + SND_SOC_DAPM_SUPPLY(HW_GAIN_1_EN_W_NAME,
> + AFE_GAIN1_CON0, GAIN1_ON_SFT, 0,
> + mtk_hw_gain_event,
> + SND_SOC_DAPM_PRE_PMU),
> +
> + SND_SOC_DAPM_SUPPLY(HW_GAIN_2_EN_W_NAME,
> + AFE_GAIN2_CON0, GAIN2_ON_SFT, 0,
> + mtk_hw_gain_event,
> + SND_SOC_DAPM_PRE_PMU),
> +
> + SND_SOC_DAPM_INPUT("HW Gain 1 Out Endpoint"),
> + SND_SOC_DAPM_INPUT("HW Gain 2 Out Endpoint"),
> + SND_SOC_DAPM_OUTPUT("HW Gain 1 In Endpoint"),
> +};
> +
> +static const struct snd_soc_dapm_route mtk_dai_hw_gain_routes[] = {
> + {"HW Gain 1 In", NULL, "HW_GAIN1_IN_CH1"},
> + {"HW Gain 1 In", NULL, "HW_GAIN1_IN_CH2"},
> + {"HW Gain 2 In", NULL, "HW_GAIN2_IN_CH1"},
> + {"HW Gain 2 In", NULL, "HW_GAIN2_IN_CH2"},
> +
> + {"HW Gain 1 In", NULL, HW_GAIN_1_EN_W_NAME},
> + {"HW Gain 1 Out", NULL, HW_GAIN_1_EN_W_NAME},
> + {"HW Gain 2 In", NULL, HW_GAIN_2_EN_W_NAME},
> + {"HW Gain 2 Out", NULL, HW_GAIN_2_EN_W_NAME},
> +
> + {"HW Gain 1 In Endpoint", NULL, "HW Gain 1 In"},
> + {"HW Gain 1 Out", NULL, "HW Gain 1 Out Endpoint"},
> + {"HW Gain 2 Out", NULL, "HW Gain 2 Out Endpoint"},
> +};
> +
> +static const struct snd_kcontrol_new mtk_hw_gain_controls[] = {
> + SOC_SINGLE("HW Gain 1 Volume", AFE_GAIN1_CON1,
> + GAIN1_TARGET_SFT, GAIN1_TARGET_MASK, 0),
> + SOC_SINGLE("HW Gain 2 Volume", AFE_GAIN2_CON1,
> + GAIN2_TARGET_SFT, GAIN2_TARGET_MASK, 0),
> +};
> +
> +/* dai ops */
> +static int mtk_dai_gain_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params,
> + struct snd_soc_dai *dai)
> +{
> + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
> + unsigned int rate = params_rate(params);
> + unsigned int rate_reg = mt8186_rate_transform(afe->dev, rate, dai->id);
> +
> + dev_info(afe->dev, "%s(), id %d, stream %d, rate %d\n",
> + __func__,
> + dai->id,
> + substream->stream,
> + rate);
This should be:
dev_info(afe->dev, "%s(), id %d, stream %d, rate %d\n",
__func__, dai->id, substream->stream, rate);
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