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Date:   Fri, 18 Feb 2022 16:23:53 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     linux-kernel@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH v3 5/6] KVM: x86: make several AVIC callbacks optional

Nit, s/AVIC/APICv in the shortlog.  The "AVIC" callbacks are being deleted, not
made optional, it's kvm_x86_ops' APICv hooks that are becoming optional.

On Thu, Feb 17, 2022, Paolo Bonzini wrote:
> SVM does not need them, so mark them as optional and delete the
> implementation.
> 
> Signed-off-by: Paolo Bonzini <pbonzini@...hat.com>
> ---
>  arch/x86/include/asm/kvm-x86-ops.h | 10 +++++-----
>  arch/x86/kvm/lapic.c               | 24 ++++++++++--------------
>  arch/x86/kvm/svm/avic.c            | 18 ------------------
>  arch/x86/kvm/svm/svm.c             |  4 ----
>  arch/x86/kvm/svm/svm.h             |  1 -
>  arch/x86/kvm/x86.c                 |  4 ++--
>  6 files changed, 17 insertions(+), 44 deletions(-)
> 
> diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h
> index 5e3296c07207..c0ec066a8599 100644
> --- a/arch/x86/include/asm/kvm-x86-ops.h
> +++ b/arch/x86/include/asm/kvm-x86-ops.h
> @@ -75,11 +75,11 @@ KVM_X86_OP(enable_irq_window)
>  KVM_X86_OP_OPTIONAL(update_cr8_intercept)
>  KVM_X86_OP(check_apicv_inhibit_reasons)
>  KVM_X86_OP(refresh_apicv_exec_ctrl)
> -KVM_X86_OP(hwapic_irr_update)
> -KVM_X86_OP(hwapic_isr_update)
> +KVM_X86_OP_OPTIONAL(hwapic_irr_update)
> +KVM_X86_OP_OPTIONAL(hwapic_isr_update)
>  KVM_X86_OP_OPTIONAL(guest_apic_has_interrupt)
> -KVM_X86_OP(load_eoi_exitmap)
> -KVM_X86_OP(set_virtual_apic_mode)
> +KVM_X86_OP_OPTIONAL(load_eoi_exitmap)
> +KVM_X86_OP_OPTIONAL(set_virtual_apic_mode)
>  KVM_X86_OP_OPTIONAL(set_apic_access_page_addr)
>  KVM_X86_OP(deliver_interrupt)
>  KVM_X86_OP_OPTIONAL(sync_pir_to_irr)
> @@ -102,7 +102,7 @@ KVM_X86_OP_OPTIONAL(vcpu_blocking)
>  KVM_X86_OP_OPTIONAL(vcpu_unblocking)
>  KVM_X86_OP_OPTIONAL(pi_update_irte)
>  KVM_X86_OP_OPTIONAL(pi_start_assignment)
> -KVM_X86_OP(apicv_post_state_restore)
> +KVM_X86_OP_OPTIONAL(apicv_post_state_restore)

apicv_post_state_restore() isn't conditional, it's implemented and wired up
unconditionally by both VMX and SVM.

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