linux-kernel - Re: [PATCH 14/29] x86/ibt: Add IBT feature, MSR and #CP handling

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Message-ID: <253cf49d0b1ba9957d155764ec31dd91e82643d1.camel@intel.com>
Date:   Sat, 19 Feb 2022 01:20:24 +0000
From:   "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>
To:     "Poimboe, Josh" <jpoimboe@...hat.com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "hjl.tools@...il.com" <hjl.tools@...il.com>,
        "x86@...nel.org" <x86@...nel.org>,
        "joao@...rdrivepizza.com" <joao@...rdrivepizza.com>,
        "Cooper, Andrew" <andrew.cooper3@...rix.com>
CC:     "keescook@...omium.org" <keescook@...omium.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "samitolvanen@...gle.com" <samitolvanen@...gle.com>,
        "ndesaulniers@...gle.com" <ndesaulniers@...gle.com>,
        "Milburn, Alyssa" <alyssa.milburn@...el.com>
Subject: Re: [PATCH 14/29] x86/ibt: Add IBT feature, MSR and #CP handling

On Fri, 2022-02-18 at 17:49 +0100, Peter Zijlstra wrote:
> +static __always_inline void setup_cet(struct cpuinfo_x86 *c)
> +{
> +       u64 msr;
> +
> +       if (!IS_ENABLED(CONFIG_X86_IBT) ||
> +           !cpu_feature_enabled(X86_FEATURE_IBT))
> +               return;
> +
> +       cr4_set_bits(X86_CR4_CET);
> +
> +       rdmsrl(MSR_IA32_S_CET, msr);
> +       if (cpu_feature_enabled(X86_FEATURE_IBT))

It must be true because of the above check.

> +               msr |= CET_ENDBR_EN;
> +       wrmsrl(MSR_IA32_S_CET, msr);
> +
> +       if (!ibt_selftest()) {
> +               pr_err("IBT selftest: Failed!\n");
> +               setup_clear_cpu_cap(X86_FEATURE_IBT);
> +       }
> +}
> +