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Message-Id: <20220221131037.8809-9-srinivas.kandagatla@linaro.org>
Date: Mon, 21 Feb 2022 13:10:35 +0000
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: broonie@...nel.org
Cc: lgirdwood@...il.com, perex@...ex.cz, tiwai@...e.com,
pierre-louis.bossart@...ux.intel.com, alsa-devel@...a-project.org,
linux-kernel@...r.kernel.org, quic_srivasam@...cinc.com,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH 08/10] ASoC: codecs: wsa-macro: setup soundwire clks correctly
For SoundWire Frame sync to be generated correctly we need both MCLK
and MCLKx2 (npl). Without pm runtime enabled these two clocks will remain on,
however after adding pm runtime support its possible that NPl clock could be
turned off even when SoundWire controller is active.
Fix this by enabling mclk and npl clk when SoundWire clks are enabled.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
---
sound/soc/codecs/lpass-wsa-macro.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/lpass-wsa-macro.c b/sound/soc/codecs/lpass-wsa-macro.c
index a8d30f3b3fdf..d51d6acac28b 100644
--- a/sound/soc/codecs/lpass-wsa-macro.c
+++ b/sound/soc/codecs/lpass-wsa-macro.c
@@ -2257,6 +2257,7 @@ static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable)
struct regmap *regmap = wsa->regmap;
if (enable) {
+ clk_prepare_enable(wsa->clks[2].clk);
wsa_macro_mclk_enable(wsa, true);
/* reset swr ip */
@@ -2281,6 +2282,7 @@ static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable)
regmap_update_bits(regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
CDC_WSA_SWR_CLK_EN_MASK, 0);
wsa_macro_mclk_enable(wsa, false);
+ clk_disable_unprepare(wsa->clks[2].clk);
}
return 0;
@@ -2351,7 +2353,7 @@ static int wsa_macro_register_mclk_output(struct wsa_macro *wsa)
struct clk_init_data init;
int ret;
- parent_clk_name = __clk_get_name(wsa->clks[2].clk);
+ parent_clk_name = __clk_get_name(wsa->clks[3].clk);
init.name = clk_name;
init.ops = &swclk_gate_ops;
--
2.21.0
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