linux-kernel - RE: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality

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Message-ID: <SJ0PR02MB7279894629DCA2758355A9D2DE3A9@SJ0PR02MB7279.namprd02.prod.outlook.com>
Date:   Mon, 21 Feb 2022 12:17:02 +0000
From:   Harsha Harsha <harshah@...inx.com>
To:     Corentin Labbe <clabbe.montjoie@...il.com>
CC:     "herbert@...dor.apana.org.au" <herbert@...dor.apana.org.au>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Michal Simek <michals@...inx.com>,
        Sarat Chand Savitala <saratcha@...inx.com>,
        Harsh Jain <harshj@...inx.com>, git <git@...inx.com>
Subject: RE: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3
 functionality



> -----Original Message-----
> From: Corentin Labbe <clabbe.montjoie@...il.com>
> Sent: Friday, February 18, 2022 3:13 PM
> To: Harsha Harsha <harshah@...inx.com>
> Cc: herbert@...dor.apana.org.au; davem@...emloft.net; linux-crypto@...r.kernel.org; linux-kernel@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; Michal Simek <michals@...inx.com>; Sarat Chand Savitala <saratcha@...inx.com>; Harsh Jain
> <harshj@...inx.com>; git <git@...inx.com>
> Subject: Re: [PATCH V2 2/4] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality
> 
> Le Fri, Feb 18, 2022 at 12:44:22AM +0530, Harsha a écrit :
> > This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute
> > SHA3 hash of given data.
> >
> > Signed-off-by: Harsha <harsha.harsha@...inx.com>
> > Acked-by: Michal Simek <michal.simek@...inx.com>
> > ---
> 
> Hello
> 
> Your signed-off should contain your real name.

My complete name is Harsha which I have mentioned in the signed-off section.

> Furthermore why did you drop copyright from previous poster ?
> See https://patchwork.kernel.org/project/linux-crypto/cover/1556793282-17346-1-git-send-email-kalyani.akula@xilinx.com/ for
> reference.

I did not understand the comment. Do you want me to add Kalyani's name also in the Signed of section?

> 
> Furthermore, the previous poster didnt answered my questions about parallel processing and tests.

Since SHA3 HW engine in ZynqMPSoC does not support parallel processing of 2 hash requests, so we have changed our approach. 
Now  to support parallel processing of 2 hash requests, software fallback is being used for init, update, final, export and import in the ZynqMP SHA driver.
For digest, the calculation of SHA3 hash is done by the hardened SHA3 accelerator in Xilinx ZynqMP SoC.

Following tests have been done for the driver:
- Enabled kernel self tests and extra run-time crypto self tests
- Tested SHA hash computation for different sizes of data using userspace application
- Tested SHA hash computation using multiple updates of data using userspace application
- Tested parallel hash computation
- Tested using the tcrypt module

> 
> Regards

Regards,
Harsha