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Date: Mon, 21 Feb 2022 10:09:50 -0800 From: Tom Rix <trix@...hat.com> To: matthew.gerlach@...ux.intel.com Cc: "Zhang, Tianfei" <tianfei.zhang@...el.com>, "Wu, Hao" <hao.wu@...el.com>, "mdf@...nel.org" <mdf@...nel.org>, "Xu, Yilun" <yilun.xu@...el.com>, "linux-fpga@...r.kernel.org" <linux-fpga@...r.kernel.org>, "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, "corbet@....net" <corbet@....net> Subject: Re: [PATCH v1 7/7] fpga: dfl: pci: Add generic OFS PCI PID On 2/21/22 9:50 AM, matthew.gerlach@...ux.intel.com wrote: > > > On Fri, 18 Feb 2022, Tom Rix wrote: > >> >> On 2/18/22 1:03 AM, Zhang, Tianfei wrote: >>> >>>> -----Original Message----- >>>> From: Tom Rix <trix@...hat.com> >>>> Sent: Wednesday, February 16, 2022 12:16 AM >>>> To: Zhang, Tianfei <tianfei.zhang@...el.com>; Wu, Hao >>>> <hao.wu@...el.com>; >>>> mdf@...nel.org; Xu, Yilun <yilun.xu@...el.com>; >>>> linux-fpga@...r.kernel.org; >>>> linux-doc@...r.kernel.org; linux-kernel@...r.kernel.org >>>> Cc: corbet@....net; Matthew Gerlach <matthew.gerlach@...ux.intel.com> >>>> Subject: Re: [PATCH v1 7/7] fpga: dfl: pci: Add generic OFS PCI PID >>>> >>>> >>>> On 2/14/22 3:26 AM, Tianfei zhang wrote: >>>>> From: Matthew Gerlach <matthew.gerlach@...ux.intel.com> >>>>> >>>>> Add the PCI product id for an Open FPGA Stack PCI card. >>>> Is there a URL to the card ? >>> This PCIe Device IDs have registered by Intel. >> A URL is useful to introduce the board, Is there one ? >>> >>>>> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com> >>>>> Signed-off-by: Tianfei Zhang <tianfei.zhang@...el.com> >>>>> --- >>>>> drivers/fpga/dfl-pci.c | 4 ++++ >>>>> 1 file changed, 4 insertions(+) >>>>> >>>>> diff --git a/drivers/fpga/dfl-pci.c b/drivers/fpga/dfl-pci.c index >>>>> 83b604d6dbe6..cb2fbf3eb918 100644 >>>>> --- a/drivers/fpga/dfl-pci.c >>>>> +++ b/drivers/fpga/dfl-pci.c >>>>> @@ -76,12 +76,14 @@ static void cci_pci_free_irq(struct pci_dev >>>>> *pcidev) >>>>> #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B >>>>> #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 >>>>> #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 >>>>> +#define PCIE_DEVICE_ID_INTEL_OFS 0xbcce >>>> INTEL_OFS is a generic name, pci id's map to specific cards >>>> >>>> Is there a more specific name for this card ? >>> I think using INTEL_OFS is better, because INTEL_OFS is the Generic >>> development platform can support multiple cards which using OFS >>> specification, >>> like Intel PAC N6000 card. >> >> I would prefer something like PCIE_DEVICE_ID_INTEL_PAC_N6000 because >> it follows an existing pattern. Make it easy on a developer, they >> will look at their board or box, see X and try to find something >> similar in the driver source. >> >> To use OSF_ * the name needs a suffix to differentiate it from future >> cards that will also use ofs. >> >> If this really is a generic id please explain in the doc patch how >> every future board with use this single id and how a driver could >> work around a hw problem in a specific board with a pci id covering >> multiple boards. >> >> Tom > > Hi Tom, > > The intent is to have a generic device id that can be used with many > different boards. Currently, we have FPGA implementations for 3 > different boards using this generic id. We may need a better name for > device id than OFS. More precisely this generic device id means a PCI > function that is described by a Device Feature List (DFL). How about > PCIE_DEVICE_ID_INTEL_DFL? > > With a DFL device id, the functionality of the PF/VF is determined by > the contents of the DFL. Each Device Feature Header (DFH) in the DFL > has a revision field that can be used identify "broken" hw, or new > functionality added to a feature. Additionally, since the DFL is > typically used in a FPGA, the broken hardware, can and should be fixed > in most cases. How is lspci supposed to work ? A dfl set can change with fw updates and in theory different boards could have the same set. Tom > > Matthew >> >>> >>>> Tom >>>> >>>>> /* VF Device */ >>>>> #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF >>>>> #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 >>>>> #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 >>>>> #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C >>>>> +#define PCIE_DEVICE_ID_INTEL_OFS_VF 0xbccf >>>>> >>>>> static struct pci_device_id cci_pcie_id_tbl[] = { >>>>> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),}, >>>> @@ >>>>> -95,6 +97,8 @@ static struct pci_device_id cci_pcie_id_tbl[] = { >>>>> {PCI_DEVICE(PCI_VENDOR_ID_INTEL, >>>> PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, >>>>> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, >>>> PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, >>>>> {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, >>>>> PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, >>>>> + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_OFS),}, >>>>> + {PCI_DEVICE(PCI_VENDOR_ID_INTEL, >>>> PCIE_DEVICE_ID_INTEL_OFS_VF),}, >>>>> {0,} >>>>> }; >>>>> MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); >> >>
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