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Date:   Mon, 21 Feb 2022 08:31:49 +0000
From:   Joel Stanley <joel@....id.au>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     "Hawkins, Nick" <nick.hawkins@....com>,
        "Verdun, Jean-Marie" <verdun@....com>,
        Olof Johansson <olof@...om.net>, SoC Team <soc@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        DTML <devicetree@...r.kernel.org>
Subject: Re: [PATCH] [v3] arch: arm: boot: dts: Create HPE GXP Device Tree

On Wed, 16 Feb 2022 at 16:51, Arnd Bergmann <arnd@...db.de> wrote:
>
> On Wed, Feb 16, 2022 at 5:29 PM Hawkins, Nick <nick.hawkins@....com> wrote:

> > > +
> > > +               vrom@...00000 {
> > > +                       compatible = "mtd-ram";
> >
> > Same thing here, "vrom" is clearly not a standard name.
> >
> > NH: VROM is a Virtual ROM device that we use to create a memory mapping of a SPI flash content copy that is served to a host system. How should I rename it?
>
> Not sure, I don't remember seeing this case so far. Adding Joel to Cc,
> maybe he knows of
> another BMC that does the same thing.

We have something similar. The aspeed systems map this over LPC, using
FW cycles (aka memory accesses) over the LPC bus to read from the
BMC's SPI NOR devices, or DRAM.

The device tree bindings we have are in the LPC document:

 Documentation/devicetree/bindings/mfd/aspeed-lpc.yaml

It's the aspeed,ast2400-lpc-ctrl specifically. It takes a phandle to a
reserved-memory node.

The kernel driver is at drivers/soc/aspeed/aspeed-lpc-ctrl.c. It
exposes a character device that allows userspace to read and write to
the memory window.

We have this very aspeed specific design because it was the first
implementation in the kernel. Where possible, we should create a new
unified API for doing this type of access, where each BMC can
implement a backend. Now that we have GXP, Nuvoton and ASPEED it
should be easier to pick out common functionality.

Cheers,

Joel

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