linux-kernel - Re: [PATCH 0/4] spi-mem: Allow specifying the byte order in DTR mode

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Date:   Mon, 21 Feb 2022 08:44:35 +0100
From:   Michael Walle <michael@...le.cc>
To:     Tudor Ambarus <tudor.ambarus@...rochip.com>
Cc:     p.yadav@...com, broonie@...nel.org, miquel.raynal@...tlin.com,
        richard@....at, vigneshr@...com, linux-mtd@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
        nicolas.ferre@...rochip.com, zhengxunli@...c.com.tw,
        jaimeliao@...c.com.tw
Subject: Re: [PATCH 0/4] spi-mem: Allow specifying the byte order in DTR mode

Am 2022-02-18 15:58, schrieb Tudor Ambarus:
> Fortunately there are controllers
> that can swap back the bytes at runtime, fixing the endiannesses. 
> Provide
> a way for the upper layers to specify the byte order in DTR mode.

Are there any patches for the atmel-quadspi yet? What happens if
the controller doesn't support it? Will there be a software fallback?

-michael