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Message-ID: <20220222113924.25799-1-Hari.PrasathGE@microchip.com>
Date: Tue, 22 Feb 2022 17:09:22 +0530
From: Hari Prasath <Hari.PrasathGE@...rochip.com>
To: <nicolas.ferre@...rochip.com>, <claudiu.beznea@...rochip.com>,
<davem@...emloft.net>, <alexandre.belloni@...tlin.com>,
<ludovic.desroches@...rochip.com>, <robh+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux@...linux.org.uk>
CC: <Hari.PrasathGE@...rochip.com>
Subject: [PATCH] 1/3] ARM: dts: at91: sama7g5: Restrict ns_sram
Limit the size of SRAM available for the rest of kernel via genalloc API's to
13k. The rest of the SRAM is used by CAN controllers and hence this restriction.
Signed-off-by: Hari Prasath <Hari.PrasathGE@...rochip.com>
---
arch/arm/boot/dts/sama7g5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index eddcfbf4d223..6c7012f74b10 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -65,7 +65,7 @@
compatible = "mmio-sram";
#address-cells = <1>;
#size-cells = <1>;
- reg = <0x100000 0x20000>;
+ reg = <0x100000 0x3400>;
ranges;
};
--
2.17.1
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