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Message-ID: <YhTdY+UfIEtvDBK+@matsya>
Date: Tue, 22 Feb 2022 18:26:03 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Swapnil Jakhade <sjakhade@...ence.com>
Cc: kishon@...com, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, mparab@...ence.com,
a-govindraju@...com, r-ravikumar@...com
Subject: Re: [PATCH 1/4] phy: cadence-torrent: Add function to get PLL to be
configured for DP
On 27-01-22, 15:29, Swapnil Jakhade wrote:
> Torrent PHY PLL0 or PLL1 is used for DP depending on the single link or
> multilink protocol configuration for which PHY is configured. In multilink
> configurations with other protocols, either PLL0 or PLL1 will be used
> for DP. For single link DP, both PLLs need to be configured at POR.
>
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>
> ---
> drivers/phy/cadence/phy-cadence-torrent.c | 30 +++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
> index 7c4b8050485f..0e2839a6c65d 100644
> --- a/drivers/phy/cadence/phy-cadence-torrent.c
> +++ b/drivers/phy/cadence/phy-cadence-torrent.c
> @@ -38,6 +38,9 @@
> #define POLL_TIMEOUT_US 5000
> #define PLL_LOCK_TIMEOUT 100000
>
> +#define DP_PLL0 BIT(0)
> +#define DP_PLL1 BIT(1)
> +
> #define TORRENT_COMMON_CDB_OFFSET 0x0
>
> #define TORRENT_TX_LANE_CDB_OFFSET(ln, block_offset, reg_offset) \
> @@ -323,6 +326,7 @@ struct cdns_torrent_phy {
> void __iomem *base; /* DPTX registers base */
> void __iomem *sd_base; /* SD0801 registers base */
> u32 max_bit_rate; /* Maximum link bit rate to use (in Mbps) */
> + u32 dp_pll;
> struct reset_control *phy_rst;
> struct reset_control *apb_rst;
> struct device *dev;
> @@ -978,6 +982,30 @@ void cdns_torrent_dp_pma_cmn_vco_cfg_100mhz(struct cdns_torrent_phy *cdns_phy,
> }
> }
>
> +/* Set PLL used for DP configuration */
> +static int cdns_torrent_dp_get_pll(struct cdns_torrent_phy *cdns_phy,
> + enum cdns_torrent_phy_type phy_t2)
why return an error if you are going to ignore it!
> +{
> + switch (phy_t2) {
> + case TYPE_PCIE:
> + case TYPE_USB:
> + cdns_phy->dp_pll = DP_PLL1;
> + break;
> + case TYPE_SGMII:
> + case TYPE_QSGMII:
> + cdns_phy->dp_pll = DP_PLL0;
> + break;
> + case TYPE_NONE:
> + cdns_phy->dp_pll = DP_PLL0 | DP_PLL1;
> + break;
> + default:
> + dev_err(cdns_phy->dev, "Unsupported PHY configuration\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> /*
> * Enable or disable PLL for selected lanes.
> */
> @@ -1640,6 +1668,8 @@ static int cdns_torrent_dp_init(struct phy *phy)
> return -EINVAL;
> }
>
> + cdns_torrent_dp_get_pll(cdns_phy, TYPE_NONE);
> +
> cdns_torrent_dp_common_init(cdns_phy, inst);
>
> return cdns_torrent_dp_start(cdns_phy, inst, phy);
> --
> 2.34.1
--
~Vinod
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