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Message-ID: <20220222130903.17235-2-shubhrajyoti.datta@xilinx.com>
Date:   Tue, 22 Feb 2022 18:39:02 +0530
From:   Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
To:     <linux-clk@...r.kernel.org>
CC:     <git@...inx.com>, <michal.simek@...inx.com>,
        <linux-kernel@...r.kernel.org>,
        Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
Subject: [PATCH 1/2] clk: zynq: trivial warning fix

Fix the below warning

WARNING: Missing a blank line after declarations
+               int enable = !!(fclk_enable & BIT(i - fclk0));
+               zynq_clk_register_fclk(i, clk_output_name[i],

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@...inx.com>
---
 drivers/clk/zynq/clkc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 204b83d911b9..434511dcf5cb 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -349,6 +349,7 @@ static void __init zynq_clk_setup(struct device_node *np)
 	/* Peripheral clocks */
 	for (i = fclk0; i <= fclk3; i++) {
 		int enable = !!(fclk_enable & BIT(i - fclk0));
+
 		zynq_clk_register_fclk(i, clk_output_name[i],
 				SLCR_FPGA0_CLK_CTRL + 0x10 * (i - fclk0),
 				periph_parents, enable);
-- 
2.17.1

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