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Message-ID: <d38b0f9e-e9b9-e6d2-7da5-7169dedbc404@linux.intel.com> Date: Tue, 22 Feb 2022 11:11:13 -0500 From: "Liang, Kan" <kan.liang@...ux.intel.com> To: Steve Wahl <steve.wahl@....com>, Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>, Arnaldo Carvalho de Melo <acme@...nel.org>, Mark Rutland <mark.rutland@....com>, Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Jiri Olsa <jolsa@...hat.com>, Namhyung Kim <namhyung@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Borislav Petkov <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org, "H. Peter Anvin" <hpa@...or.com>, linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org Cc: "Liang, Kan" <kan.liang@...el.com> Subject: Re: [PATCH] perf/x86/intel/uncore: Make uncore_discovery clean for 64 bit addresses On 2/18/2022 12:54 PM, Steve Wahl wrote: > Support 64-bit BAR size for discovery, and do not truncate return from > generic_uncore_mmio_box_ctl() to 32 bits. > > Signed-off-by: Steve Wahl <steve.wahl@....com> Thanks for the patch. Reviewed-by: Kan Liang <kan.liang@...ux.intel.com> Thanks, Kan > --- > arch/x86/events/intel/uncore_discovery.c | 16 +++++++++++----- > arch/x86/events/intel/uncore_discovery.h | 2 -- > 2 files changed, 11 insertions(+), 7 deletions(-) > > diff --git a/arch/x86/events/intel/uncore_discovery.c b/arch/x86/events/intel/uncore_discovery.c > index 3049c646fa20..141a540e7403 100644 > --- a/arch/x86/events/intel/uncore_discovery.c > +++ b/arch/x86/events/intel/uncore_discovery.c > @@ -210,15 +210,21 @@ static int parse_discovery_table(struct pci_dev *dev, int die, > void __iomem *io_addr; > resource_size_t addr; > unsigned long size; > - u32 val; > + u32 val, val2; > int i; > > pci_read_config_dword(dev, bar_offset, &val); > > - if (val & UNCORE_DISCOVERY_MASK) > + if (val & ~PCI_BASE_ADDRESS_MEM_MASK & ~PCI_BASE_ADDRESS_MEM_TYPE_64) > return -EINVAL; > > - addr = (resource_size_t)(val & ~UNCORE_DISCOVERY_MASK); > + addr = (resource_size_t)(val & PCI_BASE_ADDRESS_MEM_MASK); > +#ifdef CONFIG_PHYS_ADDR_T_64BIT > + if ((val & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) { > + pci_read_config_dword(dev, bar_offset + 4, &val2); > + addr |= ((resource_size_t)val2) << 32; > + } > +#endif > size = UNCORE_DISCOVERY_GLOBAL_MAP_SIZE; > io_addr = ioremap(addr, size); > if (!io_addr) > @@ -444,7 +450,7 @@ static struct intel_uncore_ops generic_uncore_pci_ops = { > > #define UNCORE_GENERIC_MMIO_SIZE 0x4000 > > -static unsigned int generic_uncore_mmio_box_ctl(struct intel_uncore_box *box) > +static u64 generic_uncore_mmio_box_ctl(struct intel_uncore_box *box) > { > struct intel_uncore_type *type = box->pmu->type; > > @@ -456,7 +462,7 @@ static unsigned int generic_uncore_mmio_box_ctl(struct intel_uncore_box *box) > > void intel_generic_uncore_mmio_init_box(struct intel_uncore_box *box) > { > - unsigned int box_ctl = generic_uncore_mmio_box_ctl(box); > + u64 box_ctl = generic_uncore_mmio_box_ctl(box); > struct intel_uncore_type *type = box->pmu->type; > resource_size_t addr; > > diff --git a/arch/x86/events/intel/uncore_discovery.h b/arch/x86/events/intel/uncore_discovery.h > index 6d735611c281..22d40e7afbf1 100644 > --- a/arch/x86/events/intel/uncore_discovery.h > +++ b/arch/x86/events/intel/uncore_discovery.h > @@ -18,8 +18,6 @@ > #define UNCORE_DISCOVERY_BIR_BASE 0x10 > /* Discovery table BAR step */ > #define UNCORE_DISCOVERY_BIR_STEP 0x4 > -/* Mask of the discovery table offset */ > -#define UNCORE_DISCOVERY_MASK 0xf > /* Global discovery table size */ > #define UNCORE_DISCOVERY_GLOBAL_MAP_SIZE 0x20 >
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