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Date:   Tue, 22 Feb 2022 21:42:15 -0600
From:   Samuel Holland <samuel@...lland.org>
To:     Andre Przywara <andre.przywara@....com>
Cc:     Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Rob Herring <robh@...nel.org>,
        Ondrej Jirman <megous@...ous.com>,
        Icenowy Zheng <icenowy@...c.io>,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
        linux-kernel@...r.kernel.org,
        Kishon Vijay Abraham I <kishon@...com>,
        Vinod Koul <vkoul@...nel.org>, linux-phy@...ts.infradead.org
Subject: Re: [PATCH v10 12/18] phy: sun4i-usb: Rework HCI PHY (aka.
 "pmu_unk1") handling

On 2/11/22 6:26 AM, Andre Przywara wrote:
> As Icenowy pointed out, newer manuals (starting with H6) actually
> document the register block at offset 0x800 as "HCI controller and PHY
> interface", also describe the bits in our "PMU_UNK1" register.
> Let's put proper names to those "unknown" variables and symbols.
> 
> While we are at it, generalise the existing code by allowing a bitmap
> of bits to clear and set, to cover newer SoCs: The A100 and H616 use a
> different bit for the SIDDQ control.
> 
> Signed-off-by: Andre Przywara <andre.przywara@....com>

Acked-by: Samuel Holland <samuel@...lland.org>
Tested-by: Samuel Holland <samuel@...lland.org>

Tested on D1, which also requires this patch.

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