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Message-ID: <455a8a87-63e7-7864-f765-142be18d1fa8@canonical.com>
Date: Wed, 23 Feb 2022 10:15:36 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Alim Akhtar <alim.akhtar@...sung.com>,
Avri Altman <avri.altman@....com>,
Rob Herring <robh+dt@...nel.org>,
Andy Gross <agross@...nel.org>, Wei Xu <xuwei5@...ilicon.com>,
Nishanth Menon <nm@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>,
"James E.J. Bottomley" <jejb@...ux.ibm.com>,
"Martin K. Petersen" <martin.petersen@...cle.com>,
Jan Kotas <jank@...ence.com>, Li Wei <liwei213@...wei.com>,
Stanley Chu <stanley.chu@...iatek.com>,
Yaniv Gardi <ygardi@...eaurora.org>,
linux-scsi@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2 09/15] scsi: ufs: deprecate 'freq-table-hz' property
On 22/02/2022 19:16, Bjorn Andersson wrote:
> On Tue 22 Feb 06:58 PST 2022, Krzysztof Kozlowski wrote:
>
>> The 'freq-table-hz' is not correct in DT schema, because '-hz' suffix
>> defines uint32 type, not an array. Therefore deprecate 'freq-table-hz'
>> and use 'freq-table' instead.
>>
>
> Patch looks good in itself, but why don't we use opp-table to describe
> the performance states?
>
> In particular looking at the two columns of frequencies for various
> Qualcomm boards they require different performance-states.
>
> A concrete example is sm8350.dtsi, which specifies 75MHz and 300MHz as
> the first frequency pair. The lower level requires the VDD_CX power rail
> to be at least &rpmhpd_opp_low_svs, the higher frequency has a
> required-opps of &rpmhpd_opp_nom.
>
>
> As this isn't possible to express in the current binding we've just been
> forced to always run at a higher voltage level and kept this in the todo
> list.
>
> But rather than migrating freq-table-hz to freq-table and then having to
> introduce an opp table to express the power constraints, could we
> perhaps skip the intermediate step?
>
> Or would you have any other suggestion about how we can represent the
> required-opps level together with the freq-table (if that's what we want
> to stick with).
Usage of OPP tables is interesting solution. It would solve your problem
of power rail levels. This would need several opp-tables - one for each
clock, which is not a big problem.
The problem is that I do not have any UFS hardware (none of my Samsung
Exynos boards have UFS... I don't have even arm64 Exynos chips :( ), so
implementing it theoretically will be painful.
OTOH, I believe that having a working dtschema is very useful. Having
dtschema without errors/warnings is even worth some churn/intermediary work.
The intermediary work is also not that big. Once proper OPP is
implemented, we will have "just" two deprecated properties in the bindings.
Best regards,
Krzysztof
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